Intel® FPGA University Program
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DMA Controller does not work

Honored Contributor II

Hi everyone, 

I am studying the DMA Controller IP by creating a very simple system: 

Test Pattern Generator --> DMA Controller -> DDR3 SDRAM. Like this:  

Then, I use Hard Processor system to read data from DDR3 through HPS2FPGA bridge.  

At word 0: the value is 0x00000000. 

At word 1: the value is 0x00101010. 

At word 2: the value is 0x00101010. 


At word 320: the value is stil 0x00101010. 


We can see that the data we read from DDR3 is not correct with the Test Pattern. 

Is there anywhere that I need to notice?  

This is the configuration window of DMA IP:
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