Question about sample rate of audio codec WM8731 on DE2

[Altera_Forum]

hi, everyone. 

I have read code from the DE2 I2Sound Demonstration and compared with WM7831 datasheet. Everything is quite clear, except the setting of sample rate. According to the datasheet, when using sample rate of 48 khz, mclk frequency is required to be 12.288 mhz.  http://hahoangthach.googlepages.com/sample.jpg   but the demonstration provides the clock of 25 mhz ( 50/2 AUD_XCK pin). I have also check the configure of CLKIDIV2 in sampling control register, core clock is also MCLK ( not divided by 2 ).  Could you please explain me why ?? Because I intend to use the sample rate of 44.1 Khz and don't know what frequency for MCLK.  http://hahoangthach.googlepages.com/sample2.jpg

[Altera_Forum]

--- Quote Start ---  But the demonstration provides the clock of 25 Mhz ( 50/2 AUD_XCK pin).  --- Quote End ---    It's divided by 4, not by 2. The output clock changes state every second pulse of the input clock. So the full cycle is every four incoming clock pulses. Simulate it for better understanding.  Also, as you can see in the table, it doesn't have to be 12.288 MHz. It can also be 18.432 MHz. It depends on the BOSR bit.  Instead of using a divided clock, you can use a PLL to get a clock closer to the nominal value.

[Altera_Forum]

--- Quote Start ---  It's divided by 4, not by 2. The output clock changes state every second pulse of the input clock. So the full cycle is every four incoming clock pulses. Simulate it for better understanding.  --- Quote End ---    thank you, It is really divided by 4, I have misunderstood because of the name CLOCK_2. Therefore the MCLK is 12.5 Mhz ~ 12.288 Mhz. It is clear now.    --- Quote Start ---   Also, as you can see in the table, it doesn't have to be 12.288 MHz. It can also be 18.432 MHz. It depends on the BOSR bit.   --- Quote End ---    yes, in the demonstation, they set BOSR =0. ROM= 16'h1000; //mclk so, for the sample rate of 44.1 khz, i need to divide 50 mhz by 3 ( 16.667 mhz ~ 16.9344 mhz ) and set bosr = 1 ?    --- Quote Start ---   Instead of using a divided clock, you can use a PLL to get a clock closer to the nominal value.  --- Quote End ---    Thank you for your suggestion.

[Altera_Forum]

--- Quote Start ---  So, for the sample rate of 44.1 Khz, I need to divide 50 Mhz by 3 ( 16.667 Mhz ~ 16.9344 Mhz ) and set BOSR = 1 ?  --- Quote End ---    Yes, but you can't just divide a clock by 3 without violating duty cycle restrictions. You would need to use a PLL.  When using a PLL, set the wanted frequency in the PLL MegaWizard. The MegaWizard will take care of selecting the best multiplication/division.

[Altera_Forum]

--- Quote Start ---  Yes, but you can't just divide a clock by 3 without violating duty cycle restrictions. You would need to use a PLL.  When using a PLL, set the wanted frequency in the PLL MegaWizard. The MegaWizard will take care of selecting the best multiplication/division.  --- Quote End ---    thank you very much. I will use PLL as you suggest.  >:D<

[Altera_Forum]

Hi guys , I'm trying to understand the audio demo example for the altera De2 that comes into the CD 

 I'm reading the datasheet from wolfson(wm8731). At moment I doesn't know how they are using the index in the ROM array.    ROM[0]= 16'h0c00; //power down  ROM[1]= 16'h0ec2; //master  ROM[2]= 16'h0838; //sound select    ROM[3]= 16'h1000; //mclk    ROM[4]= 16'h0017; //  ROM[5]= 16'h0217; //  ROM[6]= {8'h04,1'b0,vol[6:0]}; //  ROM[7]= {8'h06,1'b0,vol[6:0]}; //sound vol    //ROM[4]= 16'h1e00; //reset   ROM[`rom_size]= 16'h1201;//active  Can you explain me please? Thank you.

[Altera_Forum]

--- Quote Start ---  Hi guys , I'm trying to understand the audio demo example for the altera De2 that comes into the CD  I'm reading the datasheet from wolfson(wm8731). At moment I doesn't know how they are using the index in the ROM array.    ROM[0]= 16'h0c00; //power down  ROM[1]= 16'h0ec2; //master  ROM[2]= 16'h0838; //sound select    ROM[3]= 16'h1000; //mclk    ROM[4]= 16'h0017; //  ROM[5]= 16'h0217; //  ROM[6]= {8'h04,1'b0,vol[6:0]}; //  ROM[7]= {8'h06,1'b0,vol[6:0]}; //sound vol    //ROM[4]= 16'h1e00; //reset   ROM[`rom_size]= 16'h1201;//active  Can you explain me please? Thank you.  --- Quote End ---    First and foremost you should understand the software control interface. one write sequence require 3 bytes : 7-bit slave address ( 0x34 ), 1write bit ( 0 ), 7-bit register address, followed by 9-bit data.  at page 46 of the datasheet, you could find Table 29:Mapping of Program Registers   ROM[0]= 16'h0c00; //power down , R6 : enable power for all modules  ROM[1]= 16'h0ec2; //master R7: used inverted BCLK, Master mode, I2S format, MSB-first left-1 justified  I believe you could easily understand the rest of the configuration. After configuring WM8731, you need to activate it by this one  ROM[`rom_size]= 16'h1201;//active  btw, For the I2sound demonstration WM8731 is configured in the sidetone mode ( directly route from mic to headphone ). If you want to make the codec speak audio from PCM like wav file, you probably want to see the configuration in SDcard to music demonstration.

[Altera_Forum]

Hi Amigo, thank you for help me. Ive understand that example. Thank you. 

 But now I've buy a SD_CARD that I've formated with FAT16 format and I've copied one song.  But when I download the sof file to my board and I connected the speakers there's not sound played.  How I can test the hardware ??? Maybe I'm forgot something?? It's very strange, could you help me please ?? Again thank you so much.

[Altera_Forum]

Ok, I think I should test the SD_CARD first and then the sound codec, otherwise I work very well with the I2Sound. Any recomendation on this topic ? 

 Also I've a small curiosity.. What's the difference if I run the demo from I2sound, because it seems that the Line IN it's always connected with the LINE OUT?.

[Altera_Forum]

--- Quote Start ---  Hi Amigo, thank you for help me. Ive understand that example. Thank you.  But now I've buy a SD_CARD that I've formated with FAT16 format and I've copied one song.  But when I download the sof file to my board and I connected the speakers there's not sound played.  How I can test the hardware ??? Maybe I'm forgot something?? It's very strange, could you help me please ?? Again thank you so much.  --- Quote End ---    SDCard to music demonstration using Nios II ( SOPC ). To make it work after downloading sof file, you need to use the program called altera_monitor_program to run NIOS II then music will come out :D.    --- Quote Start ---   it seems that the Line IN it's always connected with the LINE OUT?.  --- Quote End ---    yes, it is

[Altera_Forum]

HI Amigo, thank you so much for asist me in this trouble. 

 I've followed these insctuction but the music is not playing.:(  1. I run under the nios console   nios2-configure-sof DE2_SD_CARD_AUDIO.sof  then I run the altera monitor and I select :  Configuration >> Configure system >> I select the PTF from the project, I chosse cpu_0 processor and the .text and .data sections are in the epcs_controller .  I've search in all the project any code like C or ASM for play the waw but i doesn't found anything. (¿Do you choose any source file?) So, without selecting any file I had choosed  actions >> connector processor   Then I leave running the processor but nothing happends :S  The SD CARD was formated using mkdosfs, it's a 2gb from markvision # mkdosfs -F 16 -R 1 /dev/sdc1.   Can you help me please?? Thank you

[Altera_Forum]

Hi friend, don't worry I've fixed the problem. 

 I run the program from the NIOS 2 IDE and works !  Thank you so much

[Altera_Forum]

hi everyone, 

 I'm trying to transmit audio data with wireless devices, I take a look on the DE1_i2sound project on DE1 cd, I saw that AUD_DACLRCK pin assigned to AUD_ADCDAT pin if I assign AUD_DACLRCK to input of my wireless tranciever and assign AUD_ADCDAT to my receiver will that work? or should I work on I2C controller?

[Altera_Forum]

--- Quote Start ---  hi everyone,  I'm trying to transmit audio data with wireless devices, I take a look on the DE1_i2sound project on DE1 cd, I saw that AUD_DACLRCK pin assigned to AUD_ADCDAT pin if I assign AUD_DACLRCK to input of my wireless tranciever and assign AUD_ADCDAT to my receiver will that work? or should I work on I2C controller?  --- Quote End ---    I dont know about DE1_i2sound on DE1 cd, but I think it is the same with one on DE2. In i2sound Demo, it doesnt matter what AUD_ADCDAT is assigned to, it just simply configures the WM8731 codec so that line input from mic is connected to speaker ( by pass or side tone mode - i dont remember :p ).  It is not clear about your project, whether DE1 is source or sink. If you want DE1 could play sound from other devices via wireless, make sure that devices line-out is transmitted to AUD_ADCDAT. You also need information such as sampling frequency, bits per sample to generate correctly BCLK, AUD_DACLRCK ....etc.

[Altera_Forum]

Chào anh ! 

Tôi v&#7915;a m&#7899;i b&#7855;t &#273;&#7847;u tìm hi&#7875;u v&#7873; DE1 c&#7911;a Altera . Ch&#7911; &#273;&#7873; là thi&#7871;t k&#7871; m&#7897;t game trên DE1 . Tôi &#273;ang v&#432;&#7899;ng m&#7855;c v&#7873; ph&#7847;n audio codec c&#7911;a WM8731 . Không bi&#7871;t anh có phi&#7873;n khi ch&#7881; d&#7851;n cho tôi v&#7873; ph&#7847;n này không ? Nh&#432; là tôi s&#7869; b&#7855;t &#273;&#7847;u t&#7915; &#273;âu và làm nh&#7919;ng cái gì ? C&#7843;m &#417;n anh !  Nguy&#7877;n V&#259;n Hi&#7871;n mrnguyenhien@gmail.com

[Altera_Forum]

--- Quote Start ---  It's divided by 4, not by 2. The output clock changes state every second pulse of the input clock. So the full cycle is every four incoming clock pulses. Simulate it for better understanding.  Also, as you can see in the table, it doesn't have to be 12.288 MHz. It can also be 18.432 MHz. It depends on the BOSR bit.  Instead of using a divided clock, you can use a PLL to get a clock closer to the nominal value.  --- Quote End ---     Hi,   I'm trying to configure WM8731 Codec on DE2 board as an ADC. But i have no idea how the whole thing works. I'd like to pump in music through WM8731 Codec, and pass the music signal to FPGA (I have designed a LPF and program in cyclone II), then obtain the filtered music signal through WM8731 Codec again. The purpose that using WM8731 Codec is just to demo the audio signal filtering process in real time. I'd like to disable the filtering function that provided by WM8731 Codec. Other than configuring WM8731 Codec, i will need another file for configuring i2c so that WM8731 Codec can communicate with FPGA (cyclone II) ? Am i rite? My filter is designed to have sampling frequency of 10Khz, what frequency should i use for master clock?  Please guide me through this. If possible, i'd like to have a copy of codes as reference. I'm just a beginner. Your help will be appreciated :)