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Altera_Forum
Honored Contributor I
821 Views

Trouble with I2C on Altera De-2 board

So we're doing a project at uni based on the DE-2 115 development board. What we need to do is basically to make an application that plays audio from the audio input using the codec, and we need to be able to change the volume of the audio as well. 

 

However, we are stuck at an early stage, as we cannot even generate the I2C data sequence correctly. Thus, we are not able to initialize the control registers of the codec, and no audio can be heard. 

 

We have created a module generating the I2C data sequences required to initialize the codec. When simulating this in modelsim everything looks fine. I'm pretty sure the timing is correct, and as we are using quite a slow clock for SCLK (20 khz) I'm thinking this isn't the issue either.  

 

In order to troubleshoot this, we assigned the SCLK and SDAT to two GPIO pins, and analyzed the result with a logic analyzer. The pins seem to be driven high ar all times, and no data sequence or clock is seen. 

 

Here comes the funny part. Given the pull-up nature of the I2C bus as well as the GPIO pins, we are writing 'Z' to the pin when we want it to be high, and '0' when we want it to be low, using std_logic. And as I explained before, this only results in a constant high value of SCLK and SDAT. However, if we use '1' and '0' for high and low respectively, everything seems to be fine on the logic analyzer. We haven't dared to try using std_logic '1' and '0' on the actual bus, as it is not a good idea to write a '1' to a pull-up bus (?) 

 

Is there anyone who can shed some light on this issue? I'm very confused :cry:
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3 Replies
Altera_Forum
Honored Contributor I
31 Views

It's quite easy to damage some CODEC chips. Try running one of the audio demos that came with the board to make sure that the chip still works. Last time I used one the hardware guys burned up a couple of them before getting the board working. It was a different CODEC than on the DE2-115, so you might not have this issue.

Altera_Forum
Honored Contributor I
31 Views

 

--- Quote Start ---  

It's quite easy to damage some CODEC chips. Try running one of the audio demos that came with the board to make sure that the chip still works. Last time I used one the hardware guys burned up a couple of them before getting the board working. It was a different CODEC than on the DE2-115, so you might not have this issue. 

--- Quote End ---  

 

 

Yeah, I tried running an audio demo, and the chip appears to be still working.
Altera_Forum
Honored Contributor I
31 Views

 

--- Quote Start ---  

 

In order to troubleshoot this, we assigned the SCLK and SDAT to two GPIO pins, and analyzed the result with a logic analyzer. The pins seem to be driven high ar all times, and no data sequence or clock is seen. 

 

Here comes the funny part. Given the pull-up nature of the I2C bus as well as the GPIO pins, we are writing 'Z' to the pin when we want it to be high, and '0' when we want it to be low, using std_logic. And as I explained before, this only results in a constant high value of SCLK and SDAT. However, if we use '1' and '0' for high and low respectively, everything seems to be fine on the logic analyzer.  

--- Quote End ---  

 

 

Do you mind posting the related HDL code? 

Please also check the i2c signals are being assigned to the correct fpga pins
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