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Innovator
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DevCloud: Unable to compile for FPGAs (aoc: Quartus is not on the path!)

Hi there,

 

I noticed a change in the DevCloud environment and now I can no longer compile for the hardware, but only for the emulator.:

 

u34356@login-2:~/oneAPI/Code/mine/fdct$ qsub -I -l nodes=1:fpga_compile:ppn=2 -d . qsub: waiting for job 499700.v-qsvr-1.aidevcloud to start qsub: job 499700.v-qsvr-1.aidevcloud ready   ######################################################################## # Date: Mon Feb 17 09:43:07 PST 2020 # Job ID: 499700.v-qsvr-1.aidevcloud # User: u34356 # Resources: neednodes=1:fpga_compile:ppn=2,nodes=1:fpga_compile:ppn=2,walltime=06:00:00 ########################################################################   u34356@s001-n155:~/oneAPI/Code/mine/fdct$ source /opt/intel/inteloneapi/setvars.sh :: setvars has already been run. Skipping any further invocation. To force its re-execution, pass --force source /opt/intel/inteloneapi/setvars.sh --force force found :: initializing environment ... advisor -- latest Copyright (C) 2009-2020 Intel Corporation. All rights reserved. Intel(R) Advisor 2021.1 (build 604889) ccl -- latest clck -- latest compiler -- latest daal -- latest debugger -- latest dev-utilities -- latest dpcpp-ct -- latest inspector -- latest Copyright (C) 2009-2020 Intel Corporation. All rights reserved. Intel(R) Inspector 2021.1 (build 604032) intelpython -- latest Could not find conda environment: --force   You can list all discoverable environments with `conda info --envs`. ipp -- latest itac -- latest mkl -- latest mpi -- latest oneDNN -- latest pytorch -- latest tbb -- latest tensorflow -- latest vpl -- latest vtune -- latest Copyright (C) 2009-2020 Intel Corporation. All rights reserved. Intel(R) VTune(TM) Profiler 2021.1-beta04 (build 606082) :: oneAPI environment initialized ::   u34356@s001-n155:~/oneAPI/Code/mine/fdct$ make hw -f Makefile.fpga dpcpp -fintelfpga a.o -o fdct.fpga -Xshardware aoc: Quartus is not on the path! aoc: Is it installed on your system and quartus bin directory added to PATH environment variable? /home/u34356/tmp/fdct-2c4365.o: file not recognized: File truncated

 

 

Thanks in advance,

Menotti

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Employee
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Hi,

I found that you might be not using the correct node.

I had check the information as below:

For node s001- n081 to n92

properties = fpga_runtime,xeon,gold6128,skl,ram192gb,net1gbe,fpga,arria10 

 

For node s001-n145 to n156

properties = fpga_compile,xeon,plat8153,skl,ram384gb,net1gbe

 

It shows that s001-n145 to 156 only for fpga compile, while s001-n81 to n092 have fpga hardware which is shown in properties.

 

I had the run the hardware compilation with steps below, it is successfully to compile in hardware.

Could you try the steps below?

  1. ssh decloud
  2. git clone https://github.com/intel/BaseKit-code-samples.git
  3. qsub -I -l nodes=1:fpga:ppn=2 -d .
  4. cd BaseKit-code-samples/DPC++Compiler/vector-add/
  5. vi build_fpga_hw.sh 

#!/bin/bash

source /opt/intel/inteloneapi/setvars.sh

make hw -f Makefile.fpga

6. vi run_fpga_hw.sh

#!/bin/bash

source /opt/intel/inteloneapi/setvars.sh

make run_hw -f Makefile.fpga

7. qsub -I -l nodes=1:fpga:ppn=2 -d . build_fpga_hw.sh 

8. qsub -I -l nodes=1:fpga:ppn=2 -d . run_fpga_hw.sh 

 

Thanks

 

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Innovator
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Hi,

Thank you for your response!

I don't remember seeing the fpga property before, just fpga_compile for nodes with Quartus etc. and fpga_runtime for nodes with FPGA cards, but anyway...

u34356@login-2:~/oneAPI/DPC++Compiler/vector-add$ pbsnodes | grep properties | sort | uniq properties = experimental,xeon,clx,ram192gb,net1gbe properties = fpga_compile,xeon,plat8153,skl,ram384gb,net1gbe properties = fpga_runtime,xeon,gold6128,skl,ram192gb,net1gbe,fpga,arria10 properties = gen9,xeon,e-2176g,cfl,gpu,ram64gb,net1gbe,6cores,eus0024 properties = jupyter,batch,xeon,gold6128,skl,ram192gb,net1gbe

I was unable to reproduce your steps on Devcloud, have you done them recently? I tried with the three different properties (removing the -I option that is incorrect when giving a script) and I always get the same error (aoc: Quartus is not on the path!):

u34356@login-2:~/oneAPI/DPC++Compiler/vector-add$ qsub -l nodes=1:fpga:ppn=2 -d . build_fpga_hw.sh 506997.v-qsvr-1.aidevcloud u34356@login-2:~/oneAPI/DPC++Compiler/vector-add$ qsub -l nodes=1:fpga_compile:ppn=2 -d . build_fpga_hw.sh 506998.v-qsvr-1.aidevcloud u34356@login-2:~/oneAPI/DPC++Compiler/vector-add$ qsub -l nodes=1:fpga_runtime:ppn=2 -d . build_fpga_hw.sh 506999.v-qsvr-1.aidevcloud   u34356@login-2:~/oneAPI/DPC++Compiler/vector-add$ less build_fpga_hw.sh.e*   aoc: Quartus is not on the path! aoc: Is it installed on your system and quartus bin directory added to PATH environment variable? /home/u34356/tmp/vector-add-63c373.o: file not recognized: File truncated clang++: error: fpga compiler command failed with exit code 1 (use -v to see invocation) clang++: error: linker command failed with exit code 1 (use -v to see invocation) make: *** [vector-add.fpga] Error 1 /var/spool/torque/mom_priv/epilogue.parallel: line 12: /var/spool/torque/mom_priv/epilogue.d//95-nvdir.epilogue: Permission denied

I also tried to do it interactively with the -I option (note that the allocated nodes are in the intervals you mentioned), but I got the same error:

 

u34356@login-2:~/oneAPI/DPC++Compiler/vector-add$ qsub -I -l nodes=1:fpga_compile:ppn=2 -d . qsub: waiting for job 507000.v-qsvr-1.aidevcloud to start qsub: job 507000.v-qsvr-1.aidevcloud ready     ######################################################################## # Date: Wed Feb 19 09:51:41 PST 2020 # Job ID: 507000.v-qsvr-1.aidevcloud # User: u34356 # Resources: neednodes=1:fpga_compile:ppn=2,nodes=1:fpga_compile:ppn=2,walltime=06:00:00 ########################################################################   u34356@s001-n148:~/oneAPI/DPC++Compiler/vector-add$ make hw -f Makefile.fpga dpcpp -fintelfpga a.o -o vector-add.fpga -Xshardware aoc: Quartus is not on the path! aoc: Is it installed on your system and quartus bin directory added to PATH environment variable? /home/u34356/tmp/vector-add-0ff0ad.o: file not recognized: File truncated clang++: error: fpga compiler command failed with exit code 1 (use -v to see invocation) clang++: error: linker command failed with exit code 1 (use -v to see invocation) Makefile.fpga:17: recipe for target 'vector-add.fpga' failed make: *** [vector-add.fpga] Error 1 u34356@s001-n148:~/oneAPI/DPC++Compiler/vector-add$ logout   qsub: job 507000.v-qsvr-1.aidevcloud completed u34356@login-2:~/oneAPI/DPC++Compiler/vector-add$ qsub -I -l nodes=1:fpga_runtime:ppn=2 -d . qsub: waiting for job 507003.v-qsvr-1.aidevcloud to start qsub: job 507003.v-qsvr-1.aidevcloud ready     ######################################################################## # Date: Wed Feb 19 09:54:07 PST 2020 # Job ID: 507003.v-qsvr-1.aidevcloud # User: u34356 # Resources: neednodes=1:fpga_runtime:ppn=2,nodes=1:fpga_runtime:ppn=2,walltime=06:00:00 ########################################################################   u34356@s001-n081:~/oneAPI/DPC++Compiler/vector-add$ make hw -f Makefile.fpga dpcpp -fintelfpga a.o -o vector-add.fpga -Xshardware aoc: Quartus is not on the path! aoc: Is it installed on your system and quartus bin directory added to PATH environment variable? /home/u34356/tmp/vector-add-4c2e41.o: file not recognized: File truncated clang++: error: fpga compiler command failed with exit code 1 (use -v to see invocation) clang++: error: linker command failed with exit code 1 (use -v to see invocation) Makefile.fpga:17: recipe for target 'vector-add.fpga' failed make: *** [vector-add.fpga] Error 1 u34356@s001-n081:~/oneAPI/DPC++Compiler/vector-add$ logout

Until recently, I compiled several examples using the same scripts / parameters. Since I got the message about --force in the /opt/intel/inteloneapi/setvars.sh script I couldn't do it anymore.

 

I didn't find Quartus in any of these nodes, what should be the path?

 

Best regards,

 

Menotti

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Employee
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Hi,

I had try to recompile, but i did not see the error.

Below show the process I run the command:

 

uxxxxx@login-2:~$ ls

BaseKit-code-samples 

build_fpga_hw.sh   build_fpga_hw.sh.o502769 new  run_fpga_hw.sh.e502770 tmp           vector

uxxxxx@login-2:~$ qsub -I -l nodes=1:fpga:ppn=2 -d .

qsub: waiting for job 508727.v-qsvr-1.aidevcloud to start

qsub: job 508727.v-qsvr-1.aidevcloud ready

 

 

########################################################################

#   Date:      Wed Feb 19 17:38:13 PST 2020

#  Job ID:      508727.v-qsvr-1.aidevcloud

#   User:      u3xxxxx

# Resources:      neednodes=1:fpga:ppn=2,nodes=1:fpga:ppn=2,walltime=06:00:00

########################################################################

 

uxxxxx@s001-n081:~$ cd BaseKit-code-samples/DPC++Compiler/vector-add/

uxxxxx@s001-n081:~/BaseKit-code-samples/DPC++Compiler/vector-add$ qsub -I -l nodes=1:fpga:ppn=2 -d . build_fpga_hw.sh

qsub: waiting for job 508728.v-qsvr-1.aidevcloud to start

qsub: job 508728.v-qsvr-1.aidevcloud ready

 

 

########################################################################

#   Date:      Wed Feb 19 17:38:49 PST 2020

#  Job ID:      508728.v-qsvr-1.aidevcloud

#   User:      uxxxxx

# Resources:      neednodes=1:fpga:ppn=2,nodes=1:fpga:ppn=2,walltime=06:00:00

########################################################################

 

uxxxxx@s001-n082:~/BaseKit-code-samples/DPC++Compiler/vector-add$ qsub -I -l nodes=1:fpga:ppn=2 -d . run_fpga_hw.sh

qsub: waiting for job 508749.v-qsvr-1.aidevcloud to start

qsub: job 508749.v-qsvr-1.aidevcloud ready

 

 

########################################################################

#   Date:      Wed Feb 19 17:41:10 PST 2020

#  Job ID:      508749.v-qsvr-1.aidevcloud

#   User:      uxxxxx

# Resources:      neednodes=1:fpga:ppn=2,nodes=1:fpga:ppn=2,walltime=06:00:00

########################################################################

 

uxxxxx@s001-n083:~/BaseKit-code-samples/DPC++Compiler/vector-add$

 

For this message show is due to the command not correct in option:

u34356@login-2:~/oneAPI/DPC++Compiler/vector-add$ qsub -l nodes=1:fpga:ppn=2 -d . build_fpga_hw.sh

506997.v-qsvr-1.aidevcloud

 

Then I try the command " make hw -f Makefile.fpga", which given the the same error as yours.

dpcpp -fintelfpga -c src/vector-add.cpp -o a.o -DFPGA

dpcpp -fintelfpga a.o -o vector-add.fpga -Xshardware

aoc: Quartus is not on the path!

aoc: Is it installed on your system and quartus bin directory added to PATH environment variable?

/home/uxxxxx/tmp/vector-add-c659c0.o: file not recognized: File truncated

clang++: error: fpga compiler command failed with exit code 1 (use -v to see invocation)

clang++: error: linker command failed with exit code 1 (use -v to see invocation)

Makefile.fpga:17: recipe for target 'vector-add.fpga' failed

make: *** [vector-add.fpga] Error 1

 

For this error, I would report to the developer.

 

Thanks

 

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Employee
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Hi

For more information, below shown my directory list wit the steps I had replied before:

uxxxxx@s001-n086:~/BaseKit-code-samples/DPC++Compiler/vector-add$ ls

a.o        Makefile    Makefile.win.fpga sample.json  vector-add.vcxproj

build_fpga_hw.sh Makefile.fpga README.md     src      vector-add.vcxproj.filters

License.txt    Makefile.win  run_fpga_hw.sh   vector-add.d vector-add.vcxproj.user

 

Thanks

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Innovator
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Hi,

You also failed to compile for FPGAs and now I realize your mistake. The binary vector-add.fpga does not appear in the output of your ls command, which should be the output of the compilation for FPGA.

You should use the -I option to enter commands interactively or omit it and provide a script, but not both.

When you use the -I option in the qsub command, you open an interactive session on the node to work, but the build_fpga_hw.sh script indicated at the end of the command is ignored.

Thank you,

Menotti

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Employee
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Hi,

I just check the output file for the jobs. and it shows the same error.

I would need to check this information with developer as it could not find the Quartus path.

I will reply the information once the developer reply to me.

Thanks

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Employee
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Hi,

 

Could you try the command below:

source /data/intel_fpga/devcloudLoginToolSetup.sh

 

By using the script "devcloudLoginToolSetup.sh", you could be able to access to appropriate tool setup paths.

 

Thanks

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Beginner
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I changed the build_fpga_hw.sh script's source line with source /data/intel_fpga/devcloudLoginToolSetup.sh

 

But this did not help me, I still see the "aoc: Quartus is not on the path!" error.

 

Any other ideas?

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after sourcing the above script you will have access to two functions: devcloud_login and tools_setup. please try tools_setup

thanks

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Hi, I have done source /data/intel_fpga/devcloudLoginToolSetup.sh and launched tools_setup. This function allows you to set manually the path to the quartus for different versions. We have tried all the possibilities with no luck. It still fails to compile.

 

Despite of that, we think we have found some interesting result that may be throw us some light in order to find the solution.

 

1st option: In this option we set the quartus path the latest version we found in tools_setup.

 

sourcing /glob/development-tools/versions/intelFPGA_pro/19.3/init_quartus.sh   u36780@s001-n082:~/BaseKit-code-samples/DPC++Compiler/vector-add$ make hw -f Makefile.fpga   dpcpp -fintelfpga a.o -o vector-add.fpga -Xshardware   aoc: Compiling for FPGA. This process may take several hours to complete. Prior to performing this compile, be sure to check the reports to ensure the design will meet your performance targets. If the reports indicate performance targets are not being met, code edits may be required. Please refer to the oneAPI FPGA Optimization Guide for information on performance tuning applications for FPGAs.   Error (18640): The Quartus Partition Database File '/home/u36780/tmp/a-9fa8e9/build/dcp.qdb' was generated using version 'Version 17.1.1 Build 273 12/19/2017 SJ Pro Edition', which cannot be read by the current version of the Quartus Prime software. Regenerate '/home/u36780/tmp/a-9fa8e9/build/dcp.qdb' using the current version of the Quartus Prime Software.   Error (19296): Cannot load none snapshot - ensure the design has been compiled through all earlier stages.   Error (19829): dcp.qdb cannot be assigned. The dcp.qdb file is missing Partial Reconfiguration or Reserved Core subpartitions and assigned to the root partition. In order to assign a QDB file to the root partition, it must be created from a design using Partial Reconfiguration or Reserved Core subpartitions. To correct this error, ensure that the creation and assignment of the QDB is correct.   Error (18640): The Quartus Partition Database File '/home/u36780/tmp/a-9fa8e9/build/bsp_interface.qdb' was generated using version 'Version 17.1.1 Build 273 12/19/2017 SJ Pro Edition', which cannot be read by the current version of the Quartus Prime software. Regenerate '/home/u36780/tmp/a-9fa8e9/build/bsp_interface.qdb' using the current version of the Quartus Prime Software.   Error: Flow failed:   Error: Quartus Prime Synthesis was unsuccessful. 5 errors, 283 warnings   Error (23035): Tcl error:   Error (23031): Evaluation of Tcl script compile_script.tcl unsuccessful   Error: Quartus Prime Shell was unsuccessful. 2 errors, 0 warnings   Error (23035): Tcl error:   Error (23031): Evaluation of Tcl script build/entry.tcl unsuccessful   Error: Quartus Prime Shell was unsuccessful. 2 errors, 0 warnings   Error: Compiler Error, not able to generate hardware       /home/u36780/tmp/vector-add-522df1.o: file not recognized: File truncated   clang++: error: fpga compiler command failed with exit code 1 (use -v to see invocation)   clang++: error: linker command failed with exit code 1 (use -v to see invocation)   Makefile.fpga:17: recipe for target 'vector-add.fpga' failed   make: *** [vector-add.fpga] Error 1

 

The error information appears in line 9:

 

Error (18640): The Quartus Partition Database File '/home/u36780/tmp/a-9fa8e9/build/dcp.qdb' was generated using version 'Version 17.1.1 Build 273 12/19/2017 SJ Pro Edition', which cannot be read by the current version of the Quartus Prime software. Regenerate '/home/u36780/tmp/a-9fa8e9/build/dcp.qdb' using the current version of the Quartus Prime Software.

Where it says that the build was generated using version 17.1.1 which differs the quartus prime version.

 

2nd option: We try to compile using this previous version 17.1.

 

But in this case we get the information error that Intel FPGA SD only support quartus prime versions after 18.1.

 

sourcing /glob/development-tools/versions/intelFPGA_pro/17.1/init_quartus.sh   u36780@s001-n082:~/BaseKit-code-samples/DPC++Compiler/vector-add$ make hw -f Makefile.fpga dpcpp -fintelfpga a.o -o vector-add.fpga -Xshardware aoc: The Intel(R) FPGA SDK for OpenCL(TM) version 19.3api.0 only supports Intel(R) Quartus(R) Prime versions 18.1.0 to 19.3api.0. However, an unsupported Intel(R) Quartus(R) Prime version was found: Quartus Prime Shell Version 17.1.0 Build 240 10/25/2017 Patches 0.03dcp SJ Pro Edition Copyright (C) 2017 Intel Corporation. All rights reserved. /home/u36780/tmp/vector-add-2657a2.o: file not recognized: File truncated clang++: error: fpga compiler command failed with exit code 1 (use -v to see invocation) clang++: error: linker command failed with exit code 1 (use -v to see invocation) Makefile.fpga:17: recipe for target 'vector-add.fpga' failed make: *** [vector-add.fpga] Error 1

 

We hope this information will help to find the solution to this issue, allowing us to continue using the FPGA in Intel DevCloud as soon as. posible.

 

 

Bests,

 

 

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Beginner
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I also have the same results..

 

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Employee
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The script suggested above (source /data/intel_fpga/devcloudLoginToolSetup.sh) is usable if you are in interactive mode because it presents you an interactive menu (via tools_setup), but is not useful in batch mode. Additionally, as noted above, the options it gives you do not help because 17.1.1 is not in the options list. The current oneAPI installation that targets Intel Arria 10 FPGA requires version 17.1.1.

 

As a workaround, you can add additional commands to your build_fpga_hw.sh script. This is explicitly setting up the necessary Quartus environment variables. Here is the full .sh file:

#!/bin/bash source /opt/intel/inteloneapi/setvars.sh   ACDS_ROOT="/glob/development-tools/oneapi/inteloneapi/intelfpgadpcpp/latest/QuartusPrimePro/17.1.1/" MODELSIM_ROOT="$ACDS_ROOT/modelsim_ae/linuxaloem" QUARTUS_ROOT="$ACDS_ROOT/quartus" PATH="$ACDS_ROOT/quartus/bin:$ACDS_ROOT/nios2eds/bin:$MODELSIM_ROOT:.:$PATH"   export PATH=$PATH export QUARTUS_ROOTDIR=$QUARTUS_ROOT export QUARTUS_HOME=$QUARTUS_ROOT export LM_LICENSE_FILE=/usr/local/licenseserver/quartus.lic export ALTERAD_LICENSE=/usr/local/licenseserver/quartus.lic   make hw -f Makefile.fpga

With this updated .sh file, you can now run the compile in batch mode, using the command from the oneAPI Getting Started documentation:

qsub -l nodes=1:fpga_compile:ppn=2 -d . build_fpga_hw.sh

I will request that Intel addresses this so that the flow is fluid when following the getting started steps.

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Novice
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Hi, thank you very much for your reply. I have been able to compile my code. However, I still am not able to run it. I have followed your steps to compile but, if I try to run in a "fpga_runtime" node or just "fpga" with the script provided by https://devcloud.intel.com/oneapi/get-started/base-toolkit/#fpga-vector-add-sample-walkthrough I get the error that no device is found:

 

 

 

u36780@login-2:~/BaseKit-code-samples/DPC++Compiler/vector-add$ qsub -l nodes=1:fpga:ppn=2 -d . run_fpga_hw.sh

 

u36780@login-2:~/BaseKit-code-samples/DPC++Compiler/vector-add$ cat run_fpga_hw.sh.o533282   ######################################################################## # Date: Sat Feb 29 09:04:27 PST 2020 # Job ID: 533282.v-qsvr-1.aidevcloud # User: u36780 # Resources: neednodes=1:fpga:ppn=2,nodes=1:fpga:ppn=2,walltime=06:00:00 ########################################################################   :: setvars has already been run. Skipping any further invocation. To force its re-execution, pass --force ./vector-add.fpga Caught a synchronous DPC++ exception: No device of requested type available. Please check https://software.intel.com/en-us/articles/intel-oneapi-dpcpp-compiler-system-requirements-beta 0 (CL_SUCCESS) If you are targeting an FPGA hardware, please ensure that your system is plugged to an FPGA board that is set up correctly and compile with -DFPGA If you are targeting the FPGA emulator, compile with -DFPGA_EMULATOR. Makefile.fpga:23: recipe for target 'run_hw' failed   ######################################################################## # End of output for job 533282.v-qsvr-1.aidevcloud # Date: Sat Feb 29 09:04:29 PST 2020 ########################################################################

I have tried both scrips: the run_fpga_hw by default in the documentation and adding paths you provide for compilation with same wrong results:

 

u36780@login-2:~/BaseKit-code-samples/DPC++Compiler/vector-add$ cat run_fpga_hw.sh #!/bin/bash source /opt/intel/inteloneapi/setvars.sh   ACDS_ROOT="/glob/development-tools/oneapi/inteloneapi/intelfpgadpcpp/latest/QuartusPrimePro/17.1.1/" MODELSIM_ROOT="$ACDS_ROOT/modelsim_ae/linuxaloem" QUARTUS_ROOT="$ACDS_ROOT/quartus" PATH="$ACDS_ROOT/quartus/bin:$ACDS_ROOT/nios2eds/bin:$MODELSIM_ROOT:.:$PATH" export PATH=$PATH export QUARTUS_ROOTDIR=$QUARTUS_ROOT export QUARTUS_HOME=$QUARTUS_ROOT export LM_LICENSE_FILE=/usr/local/licenseserver/quartus.lic export ALTERAD_LICENSE=/usr/local/licenseserver/quartus.lic   make run_hw -f Makefile.fpga

Am I doing something wrong?

 

Thanks a lot

 

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You certainly aren’t doing anything wrong. Once my compilation completed I also realized that the execution on the FPGA HW is not executing. As far as I can tell, the node setup seems to have changed such that the setup of the driver and/or the OpenCL BSP is not in order.

 

I’ve reached out to some folks that are closer to the devcloud node maintenance than I am. Hopefully it can be resolved soon. In the meantime, thanks for your continued patience.

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Instead of running on login-2 (head node) and qsub into a compute node, can you try decloud_login and connect to a PAC connected server and run_fpga_hw.sh directly on a PAC connected machine (eg s001-n137, s001-n138, s001-n139)?

Thanks

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Employee
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The issue here is that the oneAPI devcloud nodes were not in an optimal state. The team recently applied a dpcpp update and there was a subsequent linking issue with one of the packages.

 

Please try following the oneAPI Getting Started guide again.

 

* The previous workaround of adding Quartus env vars to build_fpga_hw.sh should NOT be necessary.

* Execution of run_fpga_hw.sh per the GS guide should execute correctly.

 

Thanks for your patience.

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Novice
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Hi, I just have tried to execute the vector_add example from Base-Kit and it returned a success, so it worked!

 

I am trying now to compile my own fpga kernel to test but it seems the cloud is again online and working.

 

Thank you very much for your help!

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Innovator
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Hi,

Now I was able to compile for hardware again.

The previously compiled binaries apparently does not work and it is necessary to recompile then:

u34356@s001-n082:~/oneAPI/Code/mine/adpcm_decoder$ ./adpcm_decoder.fpga ./adpcm_decoder.fpga: symbol lookup error: ./adpcm_decoder.fpga: undefined symbol: _ZN2cl4sycl6detail2pi12piMemReleaseE

Thank you,

Menotti

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Employee
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Hi,

Thank you for your information.

Thanks

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