FPGA compile error (DPC++)

[osmith5]

When I try to compile basic vector-add sample from oneAPI-samples (didn't change any code) on devcloud I get following error: 

########################################################################
# Date: Thu 02 Sep 2021 12:27:25 AM PDT
# Job ID: 958723.v-qsvr-1.aidevcloud
# User: u86440
# Resources: neednodes=1:fpga_compile:ppn=2,nodes=1:fpga_compile:ppn=2,walltime=06:00:00
########################################################################

:: WARNING: setvars.sh has already been run. Skipping re-execution.
To force a re-execution of setvars.sh, use the '--force' option.
Using '--force' can result in excessive use of your environment variables.
dpcpp -O2 -g -std=c++17 -fintelfpga -c src/vector-add-buffers.cpp -o a.o -DFPGA=1
dpcpp -O2 -g -std=c++17 -fintelfpga a.o -o vector-add-buffers.fpga -Xshardware
aoc: Compiling for FPGA. This process may take several hours to complete. Prior to performing this compile, be sure to check the reports to ensure the design will meet your performance targets. If the reports indicate performance targets are not being met, code edits may be required. Please refer to the oneAPI FPGA Optimization Guide for information on performance tuning applications for FPGAs.
Error (23035): Tcl error:
Error (23031): Evaluation of Tcl script build/entry.tcl unsuccessful
Error: Quartus Prime Shell was unsuccessful. 2 errors, 0 warnings

########################################################################
# End of output for job 958723.v-qsvr-1.aidevcloud
# Date: Thu 02 Sep 2021 12:35:53 AM PDT
########################################################################

This is quartuserr.tmp file:

Traceback (most recent call last):
File "/usr/lib/python2.7/runpy.py", line 174, in _run_module_as_main
"__main__", fname, loader, pkg_name)
File "/usr/lib/python2.7/runpy.py", line 72, in _run_code
exec code in run_globals
File "./tools/packager.pyz/__main__.py", line 28, in <module>
File "./tools/packager.pyz/packager.py", line 35, in <module>
File "./tools/packager.pyz/afu.py", line 52, in <module>
File "./tools/packager.pyz/jsonschema-2.3.0/jsonschema/__init__.py", line 18, in <module>
File "./tools/packager.pyz/jsonschema-2.3.0/jsonschema/validators.py", line 161, in <module>
File "./tools/packager.pyz/jsonschema-2.3.0/jsonschema/_utils.py", line 61, in load_schema
IOError: [Errno 20] Not a directory: u'/home/u86440/tmp/a-d48620/build/tools/packager.pyz/jsonschema-2.3.0/jsonschema/schemas/draft3.json'
------------------------------------------------

while executing
"qexec "bash build/run.sh $revision_name""
("default" arm line 9)
invoked from within
"switch $tcl_platform(platform) {
windows {
post_message -type error "Full compiles to generate hardware for the FPGA are available on supported ..."
(file "build/entry.tcl" line 36)
------------------------------------------------

The same error happens on every fpga_compile node I tried. Is anyone else getting this? Is this a dependency problem?

[BoonBengT_Intel]

Hi  @osmith5,

Thank you for posting in Intel community forum, hope all is well.
Mind if I ask in which node did you tried to run the sample on?
That will allow us to identify if it is the issues of the compute node.

And in which steps did you managed to get the mention error?
Hope to hear from you soon.

Best Wishes
BB

[osmith5]

I get this error every time i compile any DPC++ code for FPGA. At first i thought the problem was in my build script but then i tried with vector-add sample and get the same error. When following the steps in get started guide, error happens at step 2.2 when submitting compilation job; so for example when i submit it with

qsub -l nodes=1:fpga_compile:ppn=2 -d . build_fpga_hw.sh

it would go to node s001-n059 and compilation ends with error after like 8 mins. The thing is that compiling for hardware used to work one month ago with no problem but now i can't get one simple sample case to compile.

[BoonBengT_Intel]

Hi @osmith5,

The mention compute node probably not part of the fpga devcloud and from the oneApi server which are corrupted.
Can you please try to use the devcloud_login command and choose the available oneApi node and try to run the example.

I try one of the node s001-n084 after running the devcloud_login command and are able to complete FPGA hardware section under 2.2.
Hope that clarify.

Best Wishes
BB

[osmith5]

You are right @BoonBengT_Intel . Using the devcloud_login nodes resolves this issue. Thank you for helping me.

[BoonBengT_Intel]

Hi @osmith5,

Great! Good to know that it is working now, with no further clarification on this thread, it will be transitioned to community support for further help on doubts in this thread, where we will no longer monitor this thread.
Thank you for the questions and as always pleasure having you here.

Best Wishes
BB