LMI interface in Intel Arria 10 Avalon Streaming Interface for PCI Express

[sgr]

Hi, I have used Intel Arria 10 Avalon Streaming Interface for PCI Express Hard IP as the root port for my design.

I was  able to get the PCIe Link Up signal (LTSSM state L0 state is high),

But while writing the configuration register space with some data i was not able to get the lmi_ack signal back.

Is there any reason why that acknowledgment (lmi_ack) is not getting generated even after the data is written to the configuration space register correctly?

Please get me back as soon as possible

[wchiah]

Hi Sagar,

Nice to see you back.

Just to let you know that Intel has received your support request and I am assigned to work on it.

Allow me some time to look into your issue. I shall come back to you with findings.

Thank you for your patience.

Best regards,

Wincent_Intel

[wchiah]

Hi Sagar,

Is there any error message/printscreen that you can provide?

Regards,

Wincent_Intel

[sgr]

Hi Wincent_Intel,

There is no error message in the print screen.

To ensure my logic is correct I had simulated my code there it is working fine. Please find the attachment for simulation result.

[wchiah]

Hi,

Could please try to change/adjust the input signal and see is it the same thing happen ?

Regards,

Wincent_Intel

[sgr]

Hi Wincent_Intel,

Can you please make sure that, whether LMI interface signal can be used for root port configuration space register write operation?

[sgr]

"Could please try to change/adjust the input signal and see is it the same thing happen?"

Yes i have tried with different input but acknowledgement is not coming 

[wchiah]

Hi,

Can you please make sure that, whether LMI interface signal can be used for root port configuration space register write operation?

• LMI Write operations are provided for AER header logging, and debugging purposes only if refer to the user guide

From what I understand, the lmi_ack (Acknowledge signal) normally will sent back when execution is complete.

Can you please check back is anything wrong with the execution part?

Regards,

Wincent_Intel

[sgr]

Hi Wincent_Intel,

• LMI Write operations are provided for AER header logging, and debugging purposes only if refer to the user guide

But we are using LMI write for Root port configuration space register operation, may be for that reason it is not working??

[wchiah]

Hi,

Yes, to your answer.

Can I know why you need to perform that action ?

Regards,

Wincent_Intel

[sgr]

Hi Wincent_Intel,

Because initially I want to configure my Root port configuration space register with appropriate value and then I want to configure my endpoint register space. So, to configure the Root port configuration space register i need LMI Write interface.

[wchiah]

Hi ,

Sagar, Thanks for sharing, but as mentioned in the User guide the LMI Write function are for debugging purpose.

The function might be limited if you need to perform the feature as needed.

Based on my understanding An acknowledge signal is sent back to the Application Layer when the execution is complete.

Can you please check if the execution is complete or stuck anywhere else?

Regards,

Wincent_Intel

[wchiah]

Hi,

I wish to follow up with you about this case.

Do you have any further questions on this matter ?

​​​​​​​Else I would like to have your permission to close this forum ticket

Regards,

Wincent_Intel

[wchiah · Accepted solution]

Hi,

We do not receive any response from you to the previous answer that I provided.

Hence, This thread will be transitioned to community support.

If you have a new question, feel free to open a new thread to get support from Intel experts.

Otherwise, the community users will continue to help you on this thread. Thank you

If you feel your support experience was less than a 9 or 10,

please allow me to correct it before closing or let me know the cause so that I may improve your future support experience.

Regards,

Wincent_Intel