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failed to compiler oneAPI sample to FPGA(D5005)



>PowerEdge R940xa

>Intel® FPGA PAC D5005



>CentOS Linux release 7.9.2009 (Core)


###Software version

>cmake version 3.23.3

>gcc (GCC) 12.2.0

>oneAPI Base Toolkit 2022.2.0.262

>Intel® FPGA Add-on for oneAPI Base Toolkit 2022.2.0:

>         Intel® FPGA Add-on supporting the Intel® FPGA Programmable AcceX leration Cards (PAC): Intel® FPGA PAC D5005, Intel® PAC with Arria® 10 GX FPGA 2022.2.0


>Quartus Prime Pro Edition Quartus Prime Pro Edition - Quartus Prime (includes Nios II EDS) >Quartus Prime Pro Edition - Quartus Prime Pro Edition Help

>Quartus Prime Pro Edition - Devices

>Quartus Prime Pro Edition - Devices - Arria 10

>Quartus Prime Pro Edition - Devices - Cyclone 10 GX

>Quartus Prime Pro Edition - Devices - Stratix 10

>ModelSim - Intel FPGA Starter Edition

>ModelSim - Intel FPGA Edition

>Intel High Level Synthesis Compiler DSP Builder Pro Edition

>Intel FPGA SDK for OpenCL Pro Edition


###PAC installation check:


$sudo fpgainfo fme

Board Management Controller, microcontroller FW version 2.0.12, RTL version 2.0.6
//****** FME ******//
Object Id : 0xED00000
PCIe s:b:d:f : 0000:5B:00:0
Device Id : 0x0B2B
Ports Num : 01
Bitstream Id : 0x202000200000237
Bitstream Version : 2.0.2
Pr Interface Id : 9346116d-a52d-5ca8-b06a-a9a389ef7c8d
MAC address : 64:4c:36:16:6:b0


$lspci | grep 0b2b
5b:00.0 Processing accelerators: Intel Corporation Device 0b2b (rev 01)


The bus was able to recognize the D5005, and then running the Hello FPGA example of opae was fine.



###failed to compile oneAPI samples 

where is samples:`oneAPI-samples-master/DirectProgramming/DPC++FPGA/Tutorials/GettingStarted/fpga_compile`



$dpcpp -fintelfpga -Xshardware -Xstarget=intel_s10sx_pac:pac_s10 fpga_compile.cpp -o main.fpga
aoc: Compiling for FPGA. This process may take several hours to complete. Prior to performing this compile, be sure to check the reports to ensure the design will meet your performance targets. If the reports indicate performance targets are not being met, code edits may be required. Please refer to the oneAPI FPGA Optimization Guide for information on performance tuning applications for FPGAs.
For more details, full Quartus compile output can be found in files quartuserr.tmp and quartus_sh_compile.log.
Error: Compiler Error, not able to generate hardware


dpcpp: error: fpga compiler command failed with exit code 1 (use -v to see invocation)


It still fails to compile. Is there something wrong with my environment or somewhere else?

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