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satheesan
Beginner
94 Views

Can assembly function written with AVX instructions be built for running on corei7?

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If I use AVX instructions in my assembly function I can built and I can run it on a Sandy Bridge based processor which will be launching in the marker in2010. My question is , is it possible for me to build the sameassembly codewithout any change to run on an existing corei7 architecture processor?(may be by using any assembler switch?). The reason for this question is, I don't want to have a performance compramise whenI move from corei7 to Sandy Bridge, and at the same time I don't want to put additional effort to build two variance, one for corei7 and another for Sandy Bridge. Thanks in advance.
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ILevi1
Valued Contributor I
94 Views
Quoting - satheesan
If I use AVX instructions in my assembly function I can built and I can run it on a Sandy Bridge based processor which will be launching in the marker in2010. My question is , is it possible for me to build the sameassembly codewithout any change to run on an existing corei7 architecture processor?(may be by using any assembler switch?). The reason for this question is, I don't want to have a performance compramise whenI move from corei7 to Sandy Bridge, and at the same time I don't want to put additional effort to build two variance, one for corei7 and another for Sandy Bridge. Thanks in advance.

You can do one of the following:

1. Use Intel compiler which supports AVX code generation and generate two code paths by using proper switches.
2. Write two versions of the performance critical function, one for SSE4.2, one for AVX.

You cannot write assembler code which uses AVX, and make it run on Core i7 (except in AVX emulator which is not optimal).

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ILevi1
Valued Contributor I
95 Views
Quoting - satheesan
If I use AVX instructions in my assembly function I can built and I can run it on a Sandy Bridge based processor which will be launching in the marker in2010. My question is , is it possible for me to build the sameassembly codewithout any change to run on an existing corei7 architecture processor?(may be by using any assembler switch?). The reason for this question is, I don't want to have a performance compramise whenI move from corei7 to Sandy Bridge, and at the same time I don't want to put additional effort to build two variance, one for corei7 and another for Sandy Bridge. Thanks in advance.

You can do one of the following:

1. Use Intel compiler which supports AVX code generation and generate two code paths by using proper switches.
2. Write two versions of the performance critical function, one for SSE4.2, one for AVX.

You cannot write assembler code which uses AVX, and make it run on Core i7 (except in AVX emulator which is not optimal).

View solution in original post

satheesan
Beginner
94 Views
Quoting - Igor Levicki

You can do one of the following:

1. Use Intel compiler which supports AVX code generation and generate two code paths by using proper switches.
2. Write two versions of the performance critical function, one for SSE4.2, one for AVX.

You cannot write assembler code which uses AVX, and make it run on Core i7 (except in AVX emulator which is not optimal).


Thank you very much Igor Levicki.
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