IPP causes invalid opcode exception at h9_ippsFFTGetSize_C_32fc

[BFalk]

We are using IPP version 7.1.1.119 on 4th generation (Haswell) Core i7 processor under INtime (5) operating system.

We are using static linkage (#include <ipp_h9.h> before #include <ipp.h>).

A call to ippsFFTInitAlloc_C_32fc causes an invalid opcode exception. This occurs inside h9_ippsFFTGetSize_C_32fc function when trying to execute the les esp,edx instruction.

Note: When configuring IPP for AVX rather than AVX2 (using ipp_g9.h instead of ipp_h9.h) - everything works correctly. It so happens that  g9_ippsFFTGetSize_C_32fc does not compries that les instruction.

We verified that our processor supports AVX2 (ran the piece of code suggested by Intel for checking this).

Please advise.

Thanks,

Beni Falk

[bronxzv]

Beni F. wrote:
Instruction stream bytes where the invalid opcode exception occurred are the following: c4 e2 51 f7 d0 8d 0c d5 47 00 00 00 ... (I don't know where this instruction ends).

from the 2nd byte this is a x0f38 prefix group, and from the 3rd byte there is an additional 0xf3 prefix, it looks like a 32-bit (since W==0) SARX instruction (*) but I may be wrong, by far the best will be to use an up to date debugger

SARX is a BMI2 instruction with another cpuid feature flag than AVX2 instructions (AFAIK, please verify), so you must also ensure that your targets (CPU and OS + BIOS) have proper support for BMI2 before to run this code path and run a fallback path otherwise

* see "SARX r32a,r/m32,r32b" in the Intel Architecture Instruction Set Extensions Programming Reference, it's at page B-21 in the August 2012 edition I have

[MarkC_Intel]

Close. It is actually HSW's SHLX instruction in the BMI2 extension. The embedded prefix in VEX.pp=1 which we denote as "66".

[bronxzv]

Mark Charney (Intel) wrote:
Close. It is actually HSW's SHLX instruction in the BMI2 extension. The embedded prefix in VEX.pp=1 which we denote as "66".

thanks, I stand corrected, it looks like I mixed my mind with VEX.pp=2 (0xF3)

[sirrida]

Have you checked whether the processor has BMI2 enabled? AVX2 is a different set. As far as I know not all Haswell processors support BMI2 (which is a pity).

[BFalk]

I am going to check it - thanks.

[Brijender_B_Intel]

Hi Beni,

One quick question,  how did you get this HSW system? Did you purchase it or did you get it from under Intel's development program?

I am trying to find out if you have early systems or not.

[BFalk]

We got a COM Express board from Advantech (a SOM-5894).

Thanks,

Beni

[Brijender_B_Intel]

Hi Beni,

Board does not tell which processor are you using, did you get the processor from advantech too? :

http://www.advantech.com/products/SOM-5894/mod_0E302D80-4F19-406B-B540-733C6924C3A6.aspx

Board supports Embedded Intel ® Core™ i7/i5/i3/Celeron ® processor.

[BFalk]

Yes we did. We got the processor with the board. It is a Haswell Core i7. According to the datasheet on the site (http://downloadt.advantech.com/ProductFile/PIS/SOM-5894/Product%20-%20Datasheet/SOM-5894_DS(06.21.13)20130624090857.pdf) it must be Core i7-4700EQ. There is no marking on the processor (at least not one that I can see) and BIOS does not say much.