Intel® ISA Extensions
Use hardware-based isolation and memory encryption to provide more code protection in your solutions.
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Instruction set extensions programming reference, revision 18


In early February, an updated instruction set extensions programming reference, revision 18, has been posted here.

It includes information about:

  • Intel® Advanced Vector Extensions 512 (Intel® AVX-512) instructions
  • Intel® Secure Hash Algorithm (Intel® SHA) extensions
  • Intel® Memory Protection Extensions (Intel® MPX)

For more information about the technologies:

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SDE is a great tool, we use is for testing backward compatibility for old CPU. It would be great, if you added support for an SSE2 CPU (Willamette, Northwood etc.). We tried to change cpuid file for mrm platform to make a fake SSE2 platform, but no luck. Everything worked perfect, but it didn't catch illegal instructions. Native SSE2 support in SDE would be great.

Best regards,

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Hi Victor, thanks for the kind words. I should look at adding CPUID files for the P4 family of chips. That would help test things that do CPUID-based dispatch.  Normally when one uses the short options like "-mrm"  or "-hsw", SDE sets both the CPUID definition and  the -chip-check feature to the corresponding chip.  But SDE currently does not have those short options for chips older than Merom. However, you can use the underlying features directly. Here's how:

You can tweak the SDE cpuid.def file for "mrm" to indicate the family/model and remove the SSSE3 and SSE3 bits and pass that modified file to SDE using  "-cpuid_in FILENAME"  (dashes or underscores work in the middle of options, so you could say "-cpuid-in FILENAME").  If your codes are not doing CPUID-based dispatch, you may only need to the chip check feature.

You can use SDE's "chip check" feature to restrict to any of Intel's chips (at least the ones the differ based on some user-level ISA feature).  Use -chip-check-list to see all the chip names:

% kits/current/sde -chip-check-list -- /bin/ls

For example, you can use the "-chip-check CORE2" option to have SDE flag instructions that are not present on Merom.    For Willamette or Northwood, use PENTIUM4.  For the 90nm version, use P4PRESCOTT.  See "sde -long-help" to see all the SDE options, including some controls for the chip-check feature. For example, the option "-chip_check_die 0" turns the fatal errors in to warnings so that you can find more issues in one run.

% kits/current/sde -chip-check CORE2 -- ./sometest
TID 0 SDE-ERROR: Executed instruction not valid for specified chip (CORE2): 0x7fff94a57ac4: pcmpistri xmm0, xmmword ptr [rdi], 0x2
Instruction bytes are: 66 0f 3a 63 07 02 


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