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Larrabee will be compatible with SSE/SSE2/SSE3/SSE4 code or not?
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Quoting - maa1
Larrabee will be compatible with SSE/SSE2/SSE3/SSE4 code or not?
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Quoting - maa1
Larrabee will be compatible with SSE/SSE2/SSE3/SSE4 code or not?
See here for the SIMD instructions Larrabee will provide: http://software.intel.com/en-us/articles/prototype-primitives-guide/
You can guess how much sense it would make to support another (a lot less powerful) SIMD instruction set when there is no code that is binary compatible anyway.
BTW, if you want to write code that can use the SSE instructions on CPUs as well as the LRBni on Larrabee you should take a look at http://gitorious.org/vc
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