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Intel® 64 and IA-32 Architectures Software Developer’s Manual
Volume 3 (3A, 3B, 3C & 3D): System Programming Guide
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I have a question about the combination of RH bit and DM bit of 10.11.1 Message Address Register Format.
I use the combination as below, it looks like work is going well.
RH = 0
DM = 1
But, there are following mentions in 10.11.1, so the combination of RH = 0 and DM = 1 looks like the wrong combination.
>If RH is 0, then the DM bit is ignored and the message is sent ahead
>independent of whether the physical orlogical destination mode is used.
If wrong, which combination should I use?
My system is AMP(Asymmetric Multiprocessing)system, and it needs to send the MSI interrupt to the plural processors without the lowest interrupt priority.
- Tags:
- Intel® Advanced Vector Extensions (Intel® AVX)
- Intel® Streaming SIMD Extensions
- Parallel Computing
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Does anybody know about this?

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