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Typos in Intel 64 and IA-32 Architectures Software Developer's Manual Volume 1

AHumblePotato
Beginner
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Not sure if this is the correct place to post this, but I noticed typos in some documentation.

Intel 64 and IA-32 Architectures Software Developer's Manual, Volume 1: Basic Architecture

Order Number: 253665-086US December 2024

Page 5-12: Section 5.1.16.1
Incorrectly refers to instruction PREFTEHCHW and PREFTEHCHWT1 instead of
PREFETCHW and PREFETCHWT1.

Page 8-28: Section 8.5.3
Incorrectly refers to Table 8-10 instead of Table 8-11.

Page 8-29: Section 8.5.4
Incorrectly states "x87 FPU resister stack" instead of "x87 FPU register stack".

 

Page 8-30: Section 8.5.5

Incorrectly states "either of re-exchanges the store instruction after proper adjustment of the operand". I am assuming that it is intended to match the verbiage in Page 8-29: Section 8.5.4 "either of re-executing the store instruction after proper adjustment of the operand".

 

Page 8-30 Section 8.5.6

States "x87 FPU handles the exception as describe in Section 4.9.1.6" instead of
"x87 FPU handles the exception as described in Section 4.9.1.6"

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AHumblePotato
Beginner
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Page 9-10: Section 9.6.5
States: "Do not use the EMMS instruction or mix MMX and x87 FPU code when using to the MMX registers to pass parameters."
Probably is intended to be "Do not use the EMMS instruction or mix MMX and x87 FPU code when using the MMX registers to pass parameters."

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