You are correct that instruction level parallelism, including simd parallel instructions, which (for IA) are topical on this forum, are not what is normally meant by the unqualified term "parallel," which typically refers to multiple threads, or possibly cilk workers, or MPI processes. Those "mimd" programming models necessarily involve instruction level parallelism, possibly including simd instructions.
AVX of course is simply one category of simd instructions for IA. Setting AVX ISA as a compiler option typically involves invoking auto-vectorization (or enabling/modifying simd intrinsics), subject to restrictions set by additional options, but it isn't exclusively about vectorization.
For example, OpenMP offers choices such as "omp parallel for" to invoke multiple threads, "omp simd" to request simd optimization of the following for() within a single thread, and "omp parallel for simd" to request both.
