try to use aligned memory on 16-byte boundary with all optimized function ipp or other mmx/sse/sse2 optimized function,
it could be solve your issue
thanks for the comments. but the 16-bit allignment did not solve the problem. originally the code is bit alligned as it runs with other platforms. the same source code runs perfectly with a pentium 3 stepping 8 (can anybody tell me what is meant by this stepping nomenclature. :smileyhappy:) but with a pentium 3 stepping 3, it does not. both have the same os. wince .net 4.2.
the following is the dissassembly code in which the illegal instruction occurs. it stops at pshufw instruction. hope this helps to furtherly analyze the problem.
1E03C920 mov ecx,dword ptr [esp+4]
1E03C924 mov edx,dword ptr [esp+8]
1E03C928 movq mm0,mmword ptr [ecx]
1E03C92B movq mm1,mmword ptr [ecx+8]
1E03C92F movq mm2,mm0
1E03C932 movq mm3,mmword ptr ds:[67CE0h]
1E03C939 pshufw mm0,mm0,88h
thanks in advance.
You need to use PX libraries, if your cpu is not 100% Intel compatible. Note, IPP dispatcher chooses PX libraries automatically in such cases, but seems you linked directly with A6 code, which is Pentium III specific.