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oct_gagra
Beginner
117 Views

Intel IPP & AMD Athlon X2 Dual Core

Hi everyone,

I am developing an image processing application with Intel IPP 6.0 and i have expirienced a dramatic performance decrease when using AMD instead of Intel processor. Originally i've been developing and testing my app on Intel Core 2 Quad (~2.4Ghz) and had frame rate ~10fps. Then i've tested my app on AMD Athlon X2 Dual Core (~2.4Ghz also), measured the performance and it was about 5 times worth (~2fps). I've checked it on the internet and there seems to be 2 major differences between this 2 processors: AMD has 2 cores when Intel has 4, and Intel supports SSE4.1 when AND doesn't. 2 cores vs 4 cores so 2 times performance decrease is ok, but not 5 times!

I use static linkage with dispatching (threaded version of the library) and i've checked what ippStaticInit says. The return value is ippStsNonIntelCpu, and that "Indicates that the static version of generic code for Intel Architecture is set"( () IPP manual). So SSE instructions aren't used and this, together with cores number, explains 5x performance decrease very well. However AMD Athlon X2 Dual Core supports SSE3 and SSSE3 according to wikipedia and i wonder why IPP wouldn't use it? I've tried to make it use SSE3 optimization and called ippStaticInitCpu(ippCpuSSE3), it returned no error, however this didn't help the performance.

So the question is: why Intel IPP uses generic code with AMD Athlon X2 Dual Core, when it can use SSE optimization. Manual says that IPP supports all AMD processors with compatible instruction sets?

Thanks in advance!

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Ying_S_Intel
Employee
117 Views

Can you find what exact the cpu optimized code is used on yoru AMD Athlon X2 Dual Core system?
Or can you run "CPUInfo" sample from ipp-samplesadvanced-usagecpuinfo to provide the output?
If you have not installed the Intel IPP samples, you may download them from http://www.intel.com/software/products/ipp/samples.htm
We are also upgrading the release build from 6.0 to 6.0 update 1, you may find the latest update 1 version from Intel Registration Center at https://registrationcenter.intel.com

Regards,
Ying