This is Ying Song, I had a chance to present a web cast"Boosting Performance of Imaging Solutions by Adopting New Deferred Mode Image Processing (DMIP) Layer " last week with our IPP architect Shinn Lee. TheDMIP is a new feature we introductedthrough the Intel IPP 6.0 beta. During the webcast,there werea lot of questions about this its implemenation. We would like to post some of questions and ouranswers here at IPP forum for users who are interested in DMIP.
If you want to learn more about the DMIP:
1) Sign Up our Intel IPP 6.0 beta at http://www.intel.com/software/products/ipp/beta and download the DMIP sample to find more information. After installation, the DMIP sample is located at directory ipp-samplesimage-processingdmip, please als refer its manual from doc folder
2) The webcase of DMIP has been archived, you can follow this link to register and get DMIP presentation.
3)Contact us via Intel Premier Support (https://premier.intel.com) or thisfourm if you have any questionsor feedback. Later on, we will also send out the IPP 6.0 beta survey to ask your feedbacks with 6.0 beta experience. So please let us know how you think this implemenation and what we can improve in future releases.
Q&As from Intel DMIP webcast:
Q: Can we use these functions from Kernel mode also? Eg using the Microsoft DDK environment?
A: DMIP is high level library, distributed in IPP 6.0 beta as Windows DLL. In that form it can't be used in kernel mode. IPP non threaded static libraries however might be used in kernel mode. There is an example in IPP which demonstrate usage in kernel mode for Windows and Linux.
Q: Can you send me the link for the IPP example in Kernel mode usage in Windows and Linux?
A: Go to this link and select the Free Code Samples button on the right. After downloading the samples from the link http://www3.intel.com/cd/software/products/asmo-na/eng/302910.htm go to the advanced-usage samples and look at the ippsdrv sample from folder ..ipp-samplesadvanced-usageippsdrv
Q: What if an application does not yield DAG? For example, iterative operations typically may be cyclic.
A: The current design does not allow iterative operation. If you have additional concerns or feedbacks, please contact us via this forum or Intel Premier Support.
: is it possible to have user-defined nodes, i.e. non-textbook filters?
A: Yes, you may create your own node classes to represent additional user defined operations. These classes can be derived from one of the intermediate or leaf node classes. There are examples of external derivative classes in the product.
Q: Is a higher CPE better than a lower CPE?
A: No, Lower CPE (processor clocks per output element) is better.
Q: Can you describe how to handle exceptions in DMIP?
A: On DMIP functional level the status code returned by most of the entry points. On the symbolic level exceptions might be thrown.
Q: Are there any samples to show how to selectively schedule/use the different cores and threads within the cores in kernel mode (as well as user mode)?
A: There are samples for Kernel mode for IPP in general, http://www3.intel.com/cd/software/products/asmo-na/eng/219967.htm under directory ..ipp-samplesadvanced-usageippsdrv but we don't have a sample for DMIP at the present time. If you need more information, please contact us via Intel Premier Support and post a question at this forum.
Q: Do we need to configure DMIP depending on target platforms?
A: No, DMIP utilizes IPP which determines processor architecture and cache and selects the right optimized functions. The idea is that DMIP will provide you platform independent API, which will take care on platform specific optimization, allowing you though to tune some parameters.
Q: Can DMIP be used from C or must one use C++?
A: DMIP interfaces are C++, so it is easier to use C++. To use DMIP in C, you may have to take care of the conversion.
Q:I have used TBB split image processing tasks . Will DMIP save me from using TBB otherwise?
A: Not necessarily, DMIP is like a high level template for image processing, unlike TBB but splits images into pieces that will fit in cache, similar to what TBB does. You could use DMIP from within TBB but the performance difference is uncertain. There is no contradiction between DMIP, TBB, IPP or your own assemble code. You can combine whatever technology to get the best from hardware.
Q: Not only IPP6.0, but also IPP 5.3 supports multi core platform?
A: Yes, IPP 5.3 supports multi-core platforms. Please check Intel IPP web site http://www.intel.com/software/products/ ipp/ for current release versions and additional FAQs about IPP support on Multi-core at: http://www.intel.com/support/performancetools/sb/CS-023200.htm and others at: http://www3.intel.com/cd/software/products/asmo-na/eng/346530.htm#perf
Is it possible to select subset of cores to use DMIP but not on others. I want to use four cores for dual quad core processors.