Solved: Locking CPU cache lines for a thread ( L1) - Page 2

Younis_A_ · ‎04-17-2014

Hi
I'm working on securing access to L1 cache by locking it line by line. Is there any way to do it? For example, two threads accessing the L1 and L1 lines are locked for a certain time to each thread accessed them.
Regards,

Younis

jimdempseyatthecove · ‎04-17-2014

If the threads are in a different process, then the virtual address spaces and physical address spaces (at any one time) preclude sharing of L1 cache. *** subject to your process not setting up shared memory between processes ***

You may have multiple threads within the same process (sharing the same virtual memory) whereby each thread can access all of the process's virtual memory. In this case, the multiple threads from the same process can share the same cache line.

If you want to exclude this from happening, then split your program into multiple processes.

You can use various inter-process messaging techniques and/or have one or more blocks of shared memory between processes. The information you want to hide from the other process is not to be placed into the shared memory block(s).

Jim Dempsey

View solution in original post

McCalpinJohn · ‎08-28-2017

There is no hardware support for "locking" lines in any level of the cache in Intel processors.

Some embedded processors (like Texas Instruments DSPs) have the ability to partition the "Level 1 SRAM" into some combination of "Level 1 Cache" and "Level 1 Scratchpad RAM". Data put in the scratchpad RAM will stay there until it is overwritten.

I think that (at least some) ARM processors have a cache locking mechanism, but I don't know anything about it...