Intel® Moderncode for Parallel Architectures
Support for developing parallel programming applications on Intel® Architecture.

Nehalem EX

pocketsoft
Beginner
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We have completed our multi-core conversion for a CPU bound algorithm. Having tested (or ordered the hardware) for the currently available processors, we are trying to setup the next test on Nehalem-EX to see if we reach a scalingplateau(not yet reached). Namely, we are interested in a two processor rig, 8-core per.

Are there any options for purchasing, renting/leasing or "borrowing" prior to general availability?
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Tom_Spyrou
Beginner
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At IDF the personal who gave me the demo of the EX mentioned that it would be production by the end of the year and that resellers should start to get them in Q1.
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gaston-hillar
Valued Contributor I
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Quoting - pocketsoft
We have completed our multi-core conversion for a CPU bound algorithm. Having tested (or ordered the hardware) for the currently available processors, we are trying to setup the next test on Nehalem-EX to see if we reach a scalingplateau(not yet reached). Namely, we are interested in a two processor rig, 8-core per.

Are there any options for purchasing, renting/leasing or "borrowing" prior to general availability?

Hi Pocketsoft,

Just a small comment. I've been at IDF 2009. Nehalem-EX is an eight physical cores CPU. However, it also has Hyper-Threading technology. Thus, it has 16 hardware threads (logical cores). Of course, it shares some resources between the logical cores. However, you'll see 16 cores in your apps. Therefore, if you get a system with 2 Nehalem-EX, you'll have 32 hardware threads (32 logical cores). We'll have to wait to Q1 2010!
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Tom_Spyrou
Beginner
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What is also great about the EX I saw demoed was that the cache was increased to 24MB and the memory bandwidth went up a lot which should make it easier to scale without really massively micromanaging the memory layout versus single core.
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TimP
Honored Contributor III
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Full memory bandwidth apparently depends on populating all the memory channels (4 DIMMs per CPU socket) and getting NUMA memory mapping correctly engaged.
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