32-to-1 multiplexer VHDL CODE Simplification

[Altera_Forum]

Hello! This is a code from a program and I was wondering if there was a way to simplify it with a for loop? Thank you for your help! library IEEE; use IEEE.STD_LOGIC_1164.ALL; use IEEE.STD_LOGIC_ARITH.ALL; use IEEE.STD_LOGIC_UNSIGNED.ALL; package fuggveny1 is function multi321 (A,B : in std_logic_vector) return std_logic; end fuggveny1; package body fuggveny1 is function multi321 (A,B: in std_logic_vector) return std_logic is begin if B = "00000" then return A(0); elsif B = "00001" then return A(1); elsif B = "00010" then return A(2); elsif B = "00011" then return A(3); elsif B = "00100" then return A(4); elsif B = "00101" then return A(5); elsif B = "00110" then return A(6); elsif B = "00111" then return A(7); elsif B = "01000" then return A(8); elsif B = "01001" then return A(9); elsif B = "01010" then return A(10); elsif B = "01011" then return A(11); elsif B = "01100" then return A(12); elsif B = "01101" then return A(13); elsif B = "01110" then return A(14); elsif B = "01111" then return A(15); elsif B = "10000" then return A(16); elsif B = "10001" then return A(17); elsif B = "10010" then return A(18); elsif B = "10011" then return A(19); elsif B = "10100" then return A(20); elsif B = "10101" then return A(21); elsif B = "10110" then return A(22); elsif B = "10111" then return A(23); elsif B = "11000" then return A(24); elsif B = "11001" then return A(25); elsif B = "11010" then return A(26); elsif B = "11011" then return A(27); elsif B = "11100" then return A(28); elsif B = "11101" then return A(29); elsif B = "11110" then return A(30); else return A(31); end if; end multi321; end fuggveny1;

[Altera_Forum]

A 32:1 mux will have a long combinatorial path through it. Depending on your application, the mux could be pipelined, eg., look at post# 5 in this thread: 

 http://www.alteraforum.com/forum/showthread.php?t=41601  It has an example of a generic pipelined multiplexer.  You can see the way for-loops can be used in the example.  Cheers, Dave

[Altera_Forum]

Alternatively a combinatorial loop is not required. If datain is your 32-bit input, sel is your 5-bit select, then the output bit select is simply ... 

  bitout <= datain(to_integer(unsigned(sel)));   Cheers, Dave