AN 556 - JTAG Secure Design Example Files

[DM38]

Hi, I was wondering if anyone had the following design example files referenced in the AN 556: Using the Design Security Features in Intel FPGAs? I have not been able to find them anywhere and would appreciate it if someone could post them. Thank you.

• JTAG_Lock_Unlock.bdf
• JTAG_Lock_Unlock_wysiwyd.v
• ALTINT_OSC.v
• User_logic_control_block.v
• Pulse_nconfig.jam

[lixy · Accepted solution]

Hi,

I checked the AN556. When I clicked the "AN556 Design Files", I can open the page and downloaded the files.

Try this link and see if you can download.

https://www.altera.com/content/dam/altera-www/global/en_US/others/literature/an/an556_ref_design.zip

Maybe the AN556 document you got is not the latest version?

Thanks & Regards,

Xiaoyan

[lixy]

Hi there,

If there's currently no further requests, I am setting this question to resolved.

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Best regards,

​​​​​​​Xiaoyan

[too_chappy]

Hi!

This link no longer works.  How can I get this design example?

Thank you so much!

Thao