About Manual Logic Duplication

[Altera_Forum]

Hi, 

 I edit Assignment Editor as follows. Ok sysstate datatouart Manual Logic Duplication sysstate_mld Yes top  After placing and routing, I started TimeQuest and then double clicked "Report All Summaries". But I didn't find sysstate_mld and sysstate's fanout number didn't change, while using maxfan can see. Should I realize sysstate_mld manually in my design to make it work or something else ?  Thanks in advance. Hubert

[Altera_Forum]

When the assignment is only applied to one node, then it always goes in the To column, but when it has a source and destination, then the node being duplicated goes into From and the destination the duplicated feeds in To column. I have some examples here: 

http://www.alterawiki.com/wiki/register_duplication_for_timing_closure Usually in the To column I put a wildcard, as it's more than one node it's fanning out to, like datatoart*. Also, note that the fan-out is not the destination in a timing report, but the node it directly feeds. For example, let's say the source node feeds a combinatorial node called blaa that then feeds the registers datatoart*, then you want blaa* in the To column. (It doesn't make sense to specify the end of the path, as the combinatorial nodes in between may be fed by other sources and may go to other destinations, so it's unclear what the duplication should do.) Finally, the source doesn't look like a single register but a bunch of registers, which this assignment can't be used for. I've really gotten in the habit of duplicating the registers(and any combinatorial logic you need to duplicate) in my source code. I have much more control than any assignment will ever give me.

[Altera_Forum]

--- Quote Start ---  When the assignment is only applied to one node, then it always goes in the To column, but when it has a source and destination, then the node being duplicated goes into From and the destination the duplicated feeds in To column. I have some examples here: http://www.alterawiki.com/wiki/register_duplication_for_timing_closure Usually in the To column I put a wildcard, as it's more than one node it's fanning out to, like datatoart*. Also, note that the fan-out is not the destination in a timing report, but the node it directly feeds. For example, let's say the source node feeds a combinatorial node called blaa that then feeds the registers datatoart*, then you want blaa* in the To column. (It doesn't make sense to specify the end of the path, as the combinatorial nodes in between may be fed by other sources and may go to other destinations, so it's unclear what the duplication should do.) Finally, the source doesn't look like a single register but a bunch of registers, which this assignment can't be used for. I've really gotten in the habit of duplicating the registers(and any combinatorial logic you need to duplicate) in my source code. I have much more control than any assignment will ever give me.  --- Quote End ---    Thanks for sharing the examples.

[Altera_Forum]

I guest I got some idea from your reply. However, I still do not know how to realize it by Quartus 2. 

Here is the technology map viewer. https://www.alteraforum.com/forum/attachment.php?attachmentid=11438  (1)What should I do to improve the delays between sysstate[0](which fans out a lot) and datatouart[0] by duplication register. (2)When what I want to duplicate is the registers of state machine, sysstate[], which means maybe a lot of other registers it depends(so as it drives), I consider it's difficult to do what you said, duplicating the registers(and any combinatorial logic you need to duplicate) in my source code. Is there easy way to reach it.