Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
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Altaccumulate megafunction

Altera_Forum
Honored Contributor II
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I'm runnung Altera Quartus II v.9.1 to programming a Cyclone III device and i have some problem with the altaccumulate megafuncition. Looking with an DSO the output of my program i see a lot of spark when i put a negative constant into the altaccumulate (signed 2's complement). Looking more attently i saw that the problem is that sometimes casually after the aclr pass trouth 1 value to 0 the accumulate start to sum the data input from a casual number and not from zero. 

waiting your response  

Luca
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Altera_Forum
Honored Contributor II
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To avoid timing violations, an asynchronous reset must be released synchronous to clk. The same applies to any asynchronous clear. Follow the respective recommendations for reset generation in the Quartus software manual, you'll also find various contributions in Altera forum related to this problem. It's better to use an synchronous clear respectively load if ever possible.

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