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Altera preprocessor definitions

Altera_Forum
Honored Contributor II
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Hi all OpenCL / FPGA hackers 

 

I'm working on some OpenCL that I would like to run on our Bittware FPGA card and compare against GPU version (an obvious exercise, which I am sure many have already done). Now while OpenCL is portable, this does not translate to performance portability, so to make a fare comparison I should optimise the OpenCL for an ALtera FPGA and then for th NVidia Card... there should be plenty of code resuse but there will be certain vendor specific things ( num_simd_work_items on the Device side, or changing the kernel coding style significantly in places) so I'd like to do something like 

# ifdef __ALTERA__  

// special optimised FPGA kernel code# else 

// GPU optimised kernel code# endif 

 

But I can find anything about such definitions being asserted by aoc  

 

Does anyone have insider information about the defintions made by aoc? 

 

If not then I can just manually assert -D__ALTERA__ and thats fine... but I'd like to know any proper defintions. 

 

Thank you in advanced,
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Altera_Forum
Honored Contributor II
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Hi, 

 

I believe that ALTERA_CL is a preprocessor definition that aoc will automatically set for you upon compilation. Also, __attribute__(...) should be ignored by a vendor's OpenCL compiler if it is not understood, maybe generate a compile warning, but not a compile error. 

 

Are there any other preprocessor definitions that you have in mind? 

 

Cheers!
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Altera_Forum
Honored Contributor II
455 Views

 

--- Quote Start ---  

Hi, 

 

I believe that ALTERA_CL is a preprocessor definition that aoc will automatically set for you upon compilation. Also, __attribute__(...) should be ignored by a vendor's OpenCL compiler if it is not understood, maybe generate a compile warning, but not a compile error. 

 

Are there any other preprocessor definitions that you have in mind? 

 

Cheers! 

--- Quote End ---  

 

 

No I think ALTERA_CL will be sufficient for my needs thankyou, I mainly what to have the FPGA and GPU optimised code in the same source file. 

 

Thank you
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