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Anything wrong with this code for using CRC generator

Altera_Forum
Honored Contributor II
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first time to use CRC generator from plugin 

 

1. 

i am not sure whether assign 0 to reset_n 

 

2. 

when payload more than 32 , does it mean to set endofpacket 0, until final 32 in payload , set it 1 

 

3. 

i am not sure that i understand empty this input attribute, i guess it used when endofpacket is '1' and count number of 0 in data. is it correct? if not, when and how to do? any example? 

 

constant preamble : STD_LOGIC_VECTOR (7 DOWNTO 0) := '5555555555555555'; 

constant dest_mac_addr : STD_LOGIC_VETOR (5 DOWNTO 0) := '1078D2AD90CB'; 

constant src_mac_addr : STD_LOGIC_VECTOR (5 DOWNTO 0) := '001234567890'; 

constant payload : STD_LOGIC_VECTOR (7 DOWNTO 0) := '0001020304050607'; 

constant wholepacketlength : STD_LOGIC_VECTOR (1 DOWNTO 0) := '22'; 

 

variable tx_data : STD_LOGIC_VECTOR(31 DOWNTO 0); 

variable CheckSumResult : STD_LOGIC_VECTOR (31 DOWNTO 0); 

variable CheckSumValid : STD_LOGIC; 

 

 

constant enableit : STD_LOGIC := '1'; 

constant disableit : STD_LOGIC := '0'; 

begin 

 

 

tx_data <= preamble; 

tx_data <= dest_mac_addr; 

tx_data <= src_mac_addr; 

tx_data <= payload; 

 

H2:crcgen port map( 

clk => CLOCK_50, --: IN STD_LOGIC; 

data => payload, -- : IN STD_LOGIC_VECTOR (7 DOWNTO 0); 

datavalid => enableit, --: IN STD_LOGIC; 

empty => disableit : IN STD_LOGIC_VECTOR (1 DOWNTO 0); 

endofpacket => enableit, --: IN STD_LOGIC; 

reset_n => disableit, --: IN STD_LOGIC; 

checksum => CheckSumResult, --: OUT STD_LOGIC_VECTOR (31 DOWNTO 0); 

crcvalid => CheckSumValid --: OUT STD_LOGIC 

&nbsp;); 

 

tx_data <= CheckSumResult;
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