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Hello,
Several projects at our site are not working properly on the stratix 2 fpga using quartus 7.2. The input is a netlist from Synplify pro. However, all designs works as expected when placed with quartus 6.1, with the exact same constraints. I would like to know if you suffer from the same problem at your side.Link Copied
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I have been testing again Quartus 7.2 (On linux instead of Windows this time),
The pof's are behaving good.- Mark as New
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The problem was maybe in Quartus 7.1.

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