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Basic question

Altera_Forum
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Learning Quartus II: When I create a schematic sub-block in the main schematic block design file, the compiler will not recognize connections in or out of the sub block. I have named the signals in and our the same, but no luck?

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Altera_Forum
Honored Contributor II
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--- Quote Start ---  

Learning Quartus II: When I create a schematic sub-block in the main schematic block design file, the compiler will not recognize connections in or out of the sub block. I have named the signals in and our the same, but no luck? 

--- Quote End ---  

 

 

Hi, 

 

can you post your bdf-file ? 

 

Kind regards 

 

GPK
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Altera_Forum
Honored Contributor II
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Hello Pletz, 

Thanks for replying, here is the project in zip file which produces the compilation error.  

 

This is a simple project consisting of an input pin, connected to a sub-block that contains a nand gate, then back to an output pin. 

 

Thanks, 

Arthur
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Altera_Forum
Honored Contributor II
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In your top schematic, you have an empty sub-block, not the intended subblock-schematic. You have to insert the correct sub-block or rename the "block_name" block. 

 

P.S.: Your sub-block has no in- and output ports. So it can't be connected.
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Altera_Forum
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:) Thanks, FvM, I'm on my way for now.

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