Bidirectional pin help!

[Altera_Forum]

Hi, 

 I have a I2C code which sends write only data from my fpga to the audio codec on the board. The code is fine apart from one part  After 8 bits of transfered data from the fpga to the audio codec, the audio codec sends back 1 acknowledgement bit. (So, obviously, i have made the data line, SDA, a bidirectional pin) The problem I am having is testing this returned acknowledgement signal from the codec.  a little snippette of my code is simple, but incorrect.   s8: begin  if(SDA == 1'b0)  pres <= s2;  else pres <= s8;  end   I want to be able to see if SDA is pulled low by the external source before moving states. I believe I need an output enable, but what do I need to do to get this to work? Idealy i want to get this to work in both simulation and in reality. As you can imagine, it would be hard test if the ack has been sent due to the fact the audio codec chip in integrated on the board.

[Altera_Forum]

I don't exactly your problem. Yes, SDA (and in general also SCL) are bidirectional pins, that means Verilog inout type. According to the I2C specifications, they are operated as open drain pins: either 'Z' or '0', but never '1' as output state. You can consult example designs for Dev. Kits with I2C from Altera or Terasic.

[Altera_Forum]

Im confused, how do you send data to the codec if SDA can only be Z or 0?

[Altera_Forum]

Instead of retelling I2C operation principles, I suggest reading the original specification http://www.nxp.com/acrobat_download/various/i2cspec.pdf