CPLD PFL vs NIOS FLASH Programmer

Altera_Forum · ‎07-25-2010

Hi,

I encounter a problem to configure a EPS2180 on a custom board with the NIOS Flash Programmer.

Here is the Hardware config :

- FPGA configured at power up by a MAX2 CPLD including a PFL

- CFI Spansion 256GL 16 bits FLASH memory used to store 2 pages of .sof + NIOS .elf

- PFL option bits address is 0x0, P0 page at 0x2000, P1 page at 0x62000

- MSEL pins all fixed at GND on board (parallel programming without compression)

Now the SW config :

- Quartus 9.1 + NIOS EDS 9.1 (no SP applied)

- no firmware compression specified in Quartus

- --pfl --optionbit=0x0 specified in the script of the sof2flash utility

Results:

- Pages + option bits correctly programmed by Quartus Programmer after .sof to .pof conversion (FPGA configuration + boot of the NIOS OK)

- NIOS ELF correctly programmed by Flash Programmer

- P0 and P1 updates by NIOS Flash Programmer seems OK at the console during and after programmation (checksum control OK) but the FPGA is not configured by the CPLD at next power up (confdone doesn't rise up).

So my question :

What could be the reasons the CPLD's PFL fail to configure the FPGA after an update of the FLASH by the FLASH Programmer ?

Thanks in advance.

Altera_Forum · ‎07-26-2010

Well, the problem could be a sof2flash bug in EDS 9.1. Check al least this thread for more information: http://www.alteraforum.com/forum/showthread.php?t=22441

I managed to get a working flash file with EDS 9.1 SP2 with the additional option --programmingmode=FPP.

Good luck, Ton

Altera_Forum · ‎07-26-2010

It seems you're right and I'll upgrade soon to make tests !

I just read the following in the last "Nios II Embedded Design Suite Release

Notes and Errata" July 10 :

Flash Programmer Errata

This section describes in detail the Nios II EDS issues related to the flash programmer.

Unable to Configure FPGA from Flash with Parallel Flash Loader

If you program an FPGA image to flash memory on a board that utilizes the Parallel

Flash Loader, the FPGA subsequently fails to load from flash memory. This issue

arises because the sof2flash utility generates a flash file with an incompatible

Programmer Object File (.pof) bitstream format.

Affected Configurations

This issue impacts the following target hardware:

■ The Stratix IV GX FPGA Development Kit

■ The Arria® II GX FPGA Development Kit

■ Any hardware using the Parallel Flash Loader

Workaround

1. Visit the MySupport website and request Nios II EDS patch 0.73.

Alternatively, upgrade to the Nios II EDS v. 9.1 SP1 or later.

2. Invoke sof2flash with the following options:

■ --pfl

■ --optionsbits=<option bit address>

With these options, sof2flash generates a flash file with a compatible .pof file

bitstream format.

Solution Status : Fixed in v. 9.1 SP1 of the Nios II EDS

Altera_Forum · ‎07-27-2010

The NIOS EDS patch 0.73 resolves the sof2flash issue. I attach the patch if it can help.

After installation, there's only a warning aboout the version checking between EDS and Quartus, but il's still safe.

Ton, thanks for your help.