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Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
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Can't find a PCIe simulation library for post fit simulation.

YousefSherif
Beginner
1,160 Views

I'm using a PCIe IP "Intel Arria 10/ Cyclone 10 Hard IP For PCI Express" in my Quartus Prime Pro 21.4 design. When I generate a netlist using the "EDA Netlist Writer" tool, I find that the netlist includes some libraries at the beginning of the .vho file. I have found these libraries in this folder: "quartus\eda\sim_lib". But, there is one library I can't find anywhere: "CYCLONE10GX_PCIE_HIP". I tried the "Launch Simulation Library Compiler" tool, but it also didn't generate this library. Where can I find this library?

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wchiah
Employee
1,126 Views

Hi,


Can I know what is the simulation tools you are using ? Questa or Modelsim ?

Are you using Windows version of Quartus or Linux version ?


If you using windows version, please ensure that the path is shorten as that is limitation of the window.


Regads,

Wincent_Intel


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YousefSherif
Beginner
1,096 Views

Hi,


I'm using Questa Sim on Windows 11.

 

Sorry, I don't understand this sentence:
"If you using windows version, please ensure that the path is shorten as that is limitation of the window."

 

Regads,

Youef Sherif

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wchiah
Employee
1,078 Views

Hi,

This is a known issue by most of Windows user
https://learn.microsoft.com/en-us/windows/win32/fileio/maximum-file-path-limitation?tabs=registry

Please ensure that your folder path is not more than 260 words.
Perhaps you can try to generate the folder into your desktop to shorten the path to shorten your path or any other way.
Or generate the file in Linux then just move to your Windows host.

Regards,
Wincent_Intel

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YousefSherif
Beginner
1,038 Views

Hi,

 

I made sure that my path was no more than 250 characters. The same problem occurs. Also, the "Launch Simulation Library Compiler" tool generates all needed libraries except for this one.

 

Regards,

Yousef Sherif

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wchiah
Employee
996 Views

Hi,

Are you able to generate the design example if not in a simulation environment?
Do you search all possible libraries in the directory?

Please ensure you generated testbench simulation scripts as example below

many static design examples for simulation are only available in the

<install_dir>/ip/altera/altera_pcie/altera_pcie_a10_ed/ example_design/a10 and <install_dir>/ip/altera/altera_pcie/ altera_pcie_a10_ed/example_design/c10 directories

 

wchiah_0-1697985838174.png

 



Regards,

Wincent_Intel

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wchiah
Employee
942 Views

Hi,

 

I wish to follow up with you about this case.

Do you have any further questions on this matter ?

​​​​​​​Else I would like to have your permission to close this forum ticket

 

Regards,

Wincent_Intel

p/s: If any answer from the community or Intel Support is helpful, please feel free to give the best answer or rate 9/10 survey.


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wchiah
Employee
907 Views

Hi

 

We have not hear from you and this Case is idling. It is not recommended to idle for too long.

Therefore following our support policy, I have to put this case in close status. My apologies if any inconvenience cause

Hence, This thread will be transitioned to community support.

If you have a new question, feel free to open a new thread to get support from Intel experts.

Otherwise, the community users will continue to help you on this thread. Thank you

If your support experience falls below a 9 out of 10, I kindly request the opportunity to rectify it before concluding our interaction. If the issue cannot be resolved, please inform me of the cause so that I can learn from it and strive to enhance the quality of future service experiences. 

 

Regards,

Wincent_Intel

p/s: If any answer from the community or Intel Support is helpful, please feel free to give the best answer or rate 9/10 survey.


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