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Chip planner vs physical position on FPGA

Honored Contributor II


So after compiling, we have an image of the circuit placement and routing on chip planner, like the image below

My question is that is there any way to map this with the real locations on the physical FPGA. In other words, how do I know where in the chip planner image maps to where in the real FPGA

Thank you.
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Honored Contributor II

The Chip Planner matches the device. You have to check if it's a flip chip package to make sure the orientation is correct, but the picture is pretty accurate. But why do you need to know this?