Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
17266 Discussions

Compiled Project Fails to Simulate

MasanSigi
New User
121 Views

Hello, I would like to ask for some guidance.
This is my first time using Intel Quartus Prime Lite to write FPGA programs. I am trying to create an 8K×9 synchronous FIFO using the IP module directly. After compilation, everything seems fine, but when I move to simulation, I encounter major issues—the waveforms do not appear at all.

Could you please advise what might be causing this problem?



0 Kudos
0 Replies
Reply