Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
Intel Support hours are Monday-Fridays, 8am-5pm PST, except Holidays. Thanks to our community members who provide support during our down time or before we get to your questions. We appreciate you!

Need Forum Guidance? Click here
Search our FPGA Knowledge Articles here.

Conduit roles


Hello Everyone, 


I hope all you are doing great!


My question is: I have one component with a conduit which has 3 signals with  3 distinct roles: 



conduit1   -  Conduit


Name Role Width Direction Description
c1_s1 enable 1 Output no description
c1_s2 valid 1 Output no description
c1_s3 data 32 Output no description


And I have another component with 2 conduits but matching roles to the other component's conduit roles' : 



conduit1  -  Conduit


Name Role Width Direction Description
c2_s1 valid 1 Input no description

conduit2  -  Conduit


Name Role Width Direction Description
c2_s2 data 32 Input

no description


Now can I connect those two latter conduits to the first conduit and hope Qsys will automatically recognize and connect the lines based on roles? 

sthg like this:

add_connection compnent1.conduit1 component2.conduit1
add_connection component1.conduit1 component2.conduit2


what I would like to have in the end is have the signals connected:

c1_s2 connected to  c2_s1

c1_s3 connected to c2_s2

(c1_s1 no connection.)

Can I do it in this way?

If not, what would be the way to achieve this connectivity in the end given such conduit and signal arrangement?


Best Regards,



0 Kudos
2 Replies

Hi @omerc 


I don't see any problem for now.

Do make sure that to connect two conduit interfaces inside Platform Designer( formerly called qsys), the following conditions must be met:
• The interfaces must match exactly with the same signal roles and widths.
• The interfaces must be the opposite directions.
• Clocked conduit connections must have matching associatedClocks on each of their endpoint interfaces.




Best Regards,
Richard Tan

p/s: If any answer from the community or Intel support are helpful, please feel free to give Kudos. 



I have yet to receive any response from you to the previous question/reply/answer that I have provided but I believed that I have answered your question. 
With that, I will now transition this thread to community support. If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users will continue to help you on this thread. Thank you.

Best Regards,
Richard Tan

p/s: If any answer from the community or Intel support are helpful, please feel free to give Kudos.