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The Pin Connection Guideline for Cylone III recommends rup signal be tied to VCCIO. I've tied all other unused IO to GND. I'd like to simple use the setting for unused pins in Quartus to "as outputs driving ground" to improve noise. Will this setting cause the rup pin to driven to ground and thus causing a short to this IO pin because I have tied it to VCCIO? If so, how do I tie rup to VCCIO as recommended and still set all unused pins to driving ground without issue?
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If not using RUP for its OCT purpose, assign RUP as an output in your design and drive it to '1'. Leave it unconnected on the board.
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--- Quote Start --- The Pin Connection Guideline for Cylone III recommends rup signal be tied to VCCIO. --- Quote End --- This can't be true generally, cause RUP is just an optional I/O function of these pins. In most designs, they are used as regular I/O and surely not connected to VCCIO. However, in case of doubts, you should connect all pins as indicated in the Quartus Fitter Pin-Out report, then there can be no shorts.

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