Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
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DE2-115 how to produce a single beep

Altera_Forum
Honored Contributor II
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I need to produce a single beep on the de2-115 using verlog, but am not sure how to start. I have done hours of research and it has all gotten me no where. How would I go about producing a single beep that outputs through the line out on the fpga board. Any help would be very much appreciated

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Altera_Forum
Honored Contributor II
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What do you mean by a beep?

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Altera_Forum
Honored Contributor II
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What's your goal? If you want a simple audio indication connect an external audio amp to a pin on the GPIO header. Then generate a square wave of the desired frequency in verilog. Put a resister in series if needed to avoid saturating the amp. Maybe add an RC filter in for less buzz if desired. 

 

If you want to synthesize and generate a specific tone and output it over the audio jack, you are in for more work. First synthesize a signed 16 bit audio signal as desired. Then convert it to I2S. This goes to the DACDAT and DACLRCK pins on the codec. 

 

You use I2C to initialize and control the codec. See the codec user guide for more info on this. Also, take a look at the DE2_115_Audio demo on the board's system CD.
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