Defining Symbol-File in VHDL. Is this possible?

[Altera_Forum]

Hi, 

 I'm just curious, is there a way to describe how Quartus should create a Symbol-File in VHDL? :confused:  My intention is to tell the "Symbol-File-Generator" that for example an Input has to be placed on the right side of the generated Symbol. Are there some (Altera specific) codes for something like that?  I know that I can do it with the Symbol-Editor, but I suppose the made changes will be lost if I create the Symbol again (because I have added/removed some ports). (Besides: my Symbol-Editor crashes often and takes whole Quartus down! By now I never closed it the normal way ;))  Thanks Steffen

[Altera_Forum]

No idea? No one?

[Altera_Forum]

I don't see what VHDL should do for the definition of symbol file details, e.g. the layout port. bsf files are text files, so you are free to generate them e.g. by a tcl or java script. You can even define some special VHDL comments or private attributes that are read by the script and used to place the symbol ports.

[Altera_Forum]

--- Quote Start ---  You can even define some special VHDL comments or private attributes that are read by the script and used to place the symbol ports.  --- Quote End ---    I think that's what I had in mind. But I have no clue how to do it.