Design comparison on CycloneIV and StratixIII

[Altera_Forum]

Hello, 

 I have implemented a memory design on CycloneIV which was implemented by a author of a paper on StratixIII. The simulation results are fine in modelsim. But the behavior of the design is different on a CycloneIV device, meaning, on the Stratix device there was a drop in the frequency that was observed. But in Cyclone there is no drop frequency of operation. I know that the fabric of both the families are very different. I do not know how to reason this change in frequency behavior on both devices. I have only the free web edition of QuartusII, hence I cannot synthesize my design on Stratix for verification.   Any pointers towards how to go about comparing this difference will be of great help. How do I do a design comparison on both these devices?  Thank you.

[Altera_Forum]

--- Quote Start ---   Stratix device there was a drop in the frequency that was observed. But in Cyclone there is no drop frequency of operation.  --- Quote End ---    How are you analysing this, the Stratix would normally be mush faster, or is it the drop in performance from the peak you're looking at?  WRTcomparing the device you might just have to trawl through the documentation.   Nial