Diagnose AOC: Internal Compiler Error

[Altera_Forum]

Hi all, 

 I've been using the Altera OpenCL SDK for about a month now with no issues, but suddenly I have come across the dreaded "Error: Internal Compiler Error" prompt. The last thing I would like to do is reinstall the SDK if there is a quick fix available, but I do not really know how I can diagnose the issue.  The kernels were compiling successfully uptil recently. I checked with kernels that successfully compiled in the past, and even with examples from Altera's site. The .log file doesn't show anything out of the ordinary. "aocl daignose" returns "diagnostic_passed" on the device, but anyway I'm pretty sure it's an issue with the software.  Is there any way I can diagnose the issue without a reinstall of the SDK?  Regards, Victor

[Altera_Forum]

Hi,  

 If the log file does not show anything, the error is probably occurring during the Quartus compilation. You can run the compiler with "-v" option and see if it is happening after the first stage compilation. There are a few possibilities. If your design is close to full, it is possible that your design is simply not fitting or routing. Please check the resource estimation given by the compiler. Although it happens rarely, quartus may be failing due to a bug or simply may run out of memory if your design is big and the machine you are using does not have large amounts of memory. I think at least 8-16 GB is recommended for Quartus.

[Altera_Forum]

Hi Outku, 

 Thank you for the reply. I already did try using the -v flag during compilation, and resource estimates showed nothing out of the ordinary. I did in fact think that it could have been a bug and checked the release notes for the newer update 2 of the Altera OpenCL SDK to see if this was addressed. Sure enough, I updated both the ADS and Altera OpenCL SDK on Friday and everything was working fine (upgrade from Service Pack 1).  It is kind of uncomforting not knowing for sure what was causing the internal compiler error beyond "just a bug, meh" but I'm happy just to proceed.  Thank you for your input! Victor

[Altera_Forum]

Hi, 

 you can get more details about what the issue actually is when looking into the quartus_compile_sh.log file. Do a search for the "error" keyword, note that it can appear several times, and post the detailed error message on this forum.  What board/BSP are you targetting?  G

[Altera_Forum]

Hi gigi, 

 I appreciate your interest in helping me diagnose the problem. Unfortunately after I upgraded the Altera OpenCL SDK, I recompiled, resulting in the .log file to be overwritten. As far as I can remember, there were no hits when I ran a string search of "error" in the .log file. There were two warnings that I can't remember off the top of my head, but that was about it. So the "internal compiler error" message kept me baffled for a while. The target board was a de5net_a7, from Terasic with the Terasic BSP for Altera OpenCL SDK version 14.0.  I have been unable to replicate the problem after the update to Altera OpenCL SDK Service Pack 2, even with the exact same .cl code.  Kind regards, Victor

[Altera_Forum]

Hi Victor, 

 I've got the same problem "internal compiler error" and the error in the .log file is: Error (293007): Current module quartus_map ended unexpectedly. I'm using de5net_a7 too. Did you happen to figure out the fix for this?  Thanks -Peter    --- Quote Start ---  Hi gigi,  I appreciate your interest in helping me diagnose the problem. Unfortunately after I upgraded the Altera OpenCL SDK, I recompiled, resulting in the .log file to be overwritten. As far as I can remember, there were no hits when I ran a string search of "error" in the .log file. There were two warnings that I can't remember off the top of my head, but that was about it. So the "internal compiler error" message kept me baffled for a while. The target board was a de5net_a7, from Terasic with the Terasic BSP for Altera OpenCL SDK version 14.0.  I have been unable to replicate the problem after the update to Altera OpenCL SDK Service Pack 2, even with the exact same .cl code.  Kind regards, Victor  --- Quote End ---  

[Altera_Forum]

Hi Peter, 

 Usually I get the internal compiler error when I've got too demanding a kernel,  and the compiler simply cannot find a hardware implementation for it, given the FPGA resources.  It's often a good lesson in efficiency, but this time that wasn't the case.  I found from the resource usage report and early usage estimates that I should have been fine.  So I tested with the hello_world example off the Altera website, and sure enough it too failed to compile,  even though I had compiled its .aocx a month before without issue.  I am not sure as to whether our problems are the same, because I ran a string search in my .log file for "Error" (case-insensitive) and nothing came up. It seemed there was something off about the AOC so as I said before, I did a reinstall of the Altera OpenCL SDK, and it works fine now.  Again, my .log file didn't show any issue, so I'm not sure if we have the same problem, but you could give it a try. If you haven't checked already, you can check the resource usage to see if there is too great a demand on your FPGA hardware resources.  Best regards, Victor  Edit: There could also be something wrong with the code implemented by your .cl file. I remember getting internal compiler errors before because I made silly mistakes or assumptions.

[Altera_Forum]

In AOC version 14.0 and earlier, "Error: Internal compiler Error" means one of the underlying tools (QSYS or QUARTUS) either crashed or produced an error. The best way to diagnose this, as was pointed out before is to check <kernel>.log and quartus_sh_compile.log. Just search for "Error ". 

 The most likely cause is no-fit in Quartus. This means the kernel is too big. Resource estimator usually does a good job in estimating final resource usage but could be a bit off. Also remember that you can't really fit a 99% full design.  If you see "current module quartus_xxx ended unexpectedly", it's most likely an out-of-memory issue (assuming you didn't just kill the process :) ). Quartus, especially for Stratix V FPGAs, requires a lot of RAM on your PC. Check Quartus Device Support Release Notes (http://www.altera.com/literature/rn/rn_qts_dev_support.pdf). Just to give you an idea, for the smallest Stratix V device you'll need 8GB, going upto 28GB for the largest.  In 14.1, the "internal compiler error" message will be improved somewhat to give you a better idea of the possible causes.

[Altera_Forum]

Hi dsk, 

 Thanks for the reply. As far as I can remember, the kernel was still under the 85% logic utilization threshold mentioned in the Quartus OpenCL SDK optimization guide. I checked both .log files for errors, but found nothing except for two errors mentioned under warnings. I don't recall running anything alongside the compilation, and the system had about 32GB RAM I think. I left it running overnight.  I've had no-fits before when the quartus_fit ended unexpectedly, and the error showed up in the quartus_sh_compile.log, but in this particular case there wasn't any mention of that error, so I found it pretty baffling.  I appreciate the heads-up on the 14.1 error messages. Understandably the OpenCL SDK is still relatively new.  Kind regards, Victor