Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
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I know that dynamic array is not supported in Verilog and Quartus. I want to know does anybody has an idea or algorithm to use instead of dynamic array. I mean I am searching for something that works instead of a dynamic array. thanks
Not that it's an algoirthm but memory would be a good candidate, just size the memory for the maximum dynamic range you think you'll need. We don't really know what you are trying to accomplish so our recommendations will be shots in the dark.
