- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Hi, i have problems with my vhdl code.
This is the code: LIBRARY IEEE; use IEEE.std_logic_1164.all; use IEEE.std_logic_unsigned.all; use ieee.numeric_std.all; ENTITY brake_var IS port ( clk : in std_logic; reset : in std_logic; chip_select : in std_logic; writedata : in std_logic_vector (31 downto 0); write_n : in std_logic; address : in std_logic; readdata : out std_logic_vector (31 downto 0); out_port1 : out std_logic_vector (7 downto 0); out_port2 : out std_logic_vector (7 downto 0)); END brake_var; ARCHITECTURE brake_system OF brake_var IS signal D : unsigned (31 downto 0); -- distance d'arrêt signal v : unsigned (31 downto 0); -- vitesse du véhicule signal Dmax : unsigned (31 downto 0); -- vitesse max (danger) signal tb : std_logic; signal brake : std_logic; BEGIN readdata <= std_logic_vector(D) when address = '0' else std_logic_vector(v); registers: PROCESS (clk, reset) BEGIN if reset = '0' then D <= (others =>'0'); v <= (others =>'0'); elsif clk'event and clk = '1' then if chip_select ='1' and write_n = '0' then if address = '0' then D (31 downto 0) <= unsigned(writedata (31 downto 0)); else v (15 downto 0) <= unsigned(writedata (15 downto 0)); end if; end if; end if; END PROCESS; distance : PROCESS (clk,reset) begin if reset = '0' then D <= (others =>'0'); elsif clk'event and clk='1' then D(31 downto 0) <= (v(15 downto 0)*3)/10 + (v(15 downto 0)*v(15 downto 0))/100; else D <= (others =>'0'); end if; END PROCESS; tableau_de_bord : PROCESS (clk,reset) begin if reset = '0' then tb <= '0'; elsif clk'event and clk='1' then tb <= '0' when D < Dmax else '1' when D > Dmax; end if; end process; frein : PROCESS (clk,reset) begin if reset = '0' then brake <= '0'; elsif clk'event and clk='1' then brake <= '0' when tb = '0' else '1' when tb ='1';-- freinage end if; END PROCESS; out_port1 <= (others=> tb); out_port2 <= (others=> brake); END brake_system ; And the error : Error (10500): VHDL syntax error at ppp.vhd(61) near text "when"; expecting ";" Error (10500): VHDL syntax error at ppp.vhd(71) near text "when"; expecting ";" Error: Quartus II 32-bit Analyze Current File was unsuccessful. 2 errors, 0 warnings Error: Peak virtual memory: 329 megabytes Error: Processing ended: Sun May 25 19:34:03 2014 Error: Elapsed time: 00:00:03 Error: Total CPU time (on all processors): 00:00:03 Help me please it's urgent.Link Copied
- « Previous
- Next »
47 Replies
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
I gave you the widths of each stage
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
testing ...
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Critical Warning (332148): Timing requirements not met
same 3 errors persisting ><- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
--- Quote Start --- Critical Warning (332148): Timing requirements not met same 3 errors persisting >< --- Quote End --- what? three multipliers and a tiny bit of logic failing speed. What device are you using, what speed (I believe it is 50MHz). Even a design done in the kitchen can achieve such speed. where is your best code.
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Are you sure that the clock in your process is actually the one that you constrained, or driven by a pll connected to the clock you constrained?
If you are using a PLL, what frequency did you define for your design?- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
does any one have skype ?
(my pseudo is latrous 92 ) it would be more appropriate to explain to me if it doesnt distrurb :) thank you for your help
Reply
Topic Options
- Subscribe to RSS Feed
- Mark Topic as New
- Mark Topic as Read
- Float this Topic for Current User
- Bookmark
- Subscribe
- Printer Friendly Page
- « Previous
- Next »