Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
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Error: avalon_slave: Agent with readdatavalid signal must support at least 1 pending read

UserID4331231
New Contributor I
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while making a custome IP component with AVMM slave port I am running into this error in platform designer

Error: avalon_slave: Agent with readdatavalid signal must support at least 1 pending read

 

I have this error on Quartus 25.1 Error: pcie_ed.custom_cntrlr_0.avalon_slave: Agent with readdatavalid signal must support at least 1 pending read. as per https://www.intel.com/content/www/us/en/docs/programmable/683091/22-3/interface-properties.html 

I tried setting "maximumPendingReadTransactions " parameter by platform designer > IP> Edit IP> Parameters> add parameter it didnt work and I cant generate HDL due to this error Pls help

 

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UserID4331231
New Contributor I
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I was able to add the "maximumPendingReadTransactions " parameter. its just that how Platform designer gui is created, it made hard to figure out that you can "scroll" to right to see properties column. 

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KennyTan_Altera
Moderator
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Can you try to add a waitrequest signal and increase the pending read property?


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UserID4331231
New Contributor I
2,354 Views

I was able to add the "maximumPendingReadTransactions " parameter. its just that how Platform designer gui is created, it made hard to figure out that you can "scroll" to right to see properties column. 

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KennyTan_Altera
Moderator
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Can you provide the screenshot? probably, i can file an enhancement if it is really not user friendly enough.


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KennyTan_Altera
Moderator
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Do you have any update for the above? If not, we shall close the thread.


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UserID4331231
New Contributor I
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Hi Kenny 

the quartus tool is in our EC machines and screenshots are disabled for security and IP compliance policies. I wont be able to share screenshot.  Here are some feedback which may help you with what you may be looking for.

 

  1. i created my custom IP in platform designed using  "new component" on top left of the gui
  2. i added AVMM Memory agent port and signal to my design.  I saved and close the component.
  3. I used this component in my platform designer gui and made connections as desired.
  4. I tried to do generated HDL and it failed with the error i reported.
  5. from error I could figure out that it has to do with AVMM agent port and missing parameter.
  6. in Platform designer i clicked on my component , on right top corner of the window , i chose component instantiation.
  7. Now here on top right area of Platform Architect Gui, I felt that things are cramped here and and because of GUI theme colors (same shade of grey) i think i missed a thin horizontal bar initially, which would indicate that there things to your right. 
  8. Once I (accidently) figured that out i was able to see all parameters field there. 

 

i hope this helps

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KennyTan_Altera
Moderator
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I tried your steps but I do not see the error, I attached the project here. Can you help me to modify it?

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KennyTan_Altera
Moderator
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Not sure if you have update for the above?


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KennyTan_Altera
Moderator
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As we do not receive any response from you on the previous question that we have provided. Please login to ‘https://supporttickets.intel.com/s/?language=en_US’, view details of the desire request, and post a feed/response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you on your follow-up questions


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UserID4331231
New Contributor I
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We can close this thread. I have already marked it solved

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