Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
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Error compiling the standard niosII_cycloneII_2C35

Altera_Forum
Geehrter Beitragender II
1.475Aufrufe

i try to compile my project,but i found this error: 

error: ddio node "niosii_cycloneii_2c35_standard_sopc:inst|ddr_sdram_0:the_ddr_sdram_0|ddr_sdram_0_auk_ddr_sdram:ddr_sdram_0_auk_ddr_sdram_inst|ddr_sdram_0_auk_ddr_datapath:ddr_io|ddr_sdram_0_auk_ddr_dqs_group:\g_datapath:0:g_ddr_io|altddio_bidir:dqs_io|ddio_bidir_50l:auto_generated|output_cell_l[0]" could not be constrained to a legal location). 

 

 

Can any one help me to solve this problem:confused::confused::confused:
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1 Antworten
Altera_Forum
Geehrter Beitragender II
770Aufrufe

I'm not sure, but I guess it is because you set a PIN in a illegal Bank, for example if you set DDR_DQS[7:0] in bank 4 and that I/O need special features such 1v2 (1.2 voltage) and after you put another output signal (in same bank 4) witch requires 3v0, should be occur a BANK conflict . 

I hope this tip help you. 

Best regards. 

 

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