Error in Generating UniPHY Example Design for Cyclone V in Quartus 20.1

[ashishk1]

Hi,

I am using Quartus Prime Standard 20.1 on Windows 10 . I am trying to get DDR3 uniphy example design generated.

I am getting these errors for Cyclone V as well as Stratix V

Error: Error: mem_if_ddr3_emif_0: Error during execution of script generate_ed.tcl: s0: Error during execution of "{C:/intelfpga/20.1/quartus/../nios2eds/Nios II Command Shell.bat} make all 2>> stderr.txt": child process exited abnormally
Error: Error: mem_if_ddr3_emif_0: Error during execution of script generate_ed.tcl: s0: Execution of command "{C:/intelfpga/20.1/quartus/../nios2eds/Nios II Command Shell.bat} make all 2>> stderr.txt" failed

I tried to install patches and WSL as given in link below

https://www.intel.com/content/www/us/en/support/programmable/articles/000086780.html

but still getting same error .

Any help in resolving this will appreciated.

Thanks

Ashish 

[David_G_Intel]

Hello ashishk1

Thank you for posting on the Intel️® communities. We will move your question to the correct sub forum, the team in charge will get back to you soon.  

Regards,  

David G  

Intel Customer Support Technician