Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
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Errror when generating system and compiling in Quartus II software

Altera_Forum
Honored Contributor II
1,291 Views

Hello everyone, 

 

I have error message when I try to generate the system. 

After you add the custom instruction logic to the system, you can generate the system 

and compile it in the Quartus II software.  

To generate the system and compile, I followed these steps: 

1. In SOPC Builder, on the System Generation tab, turn on Simulation. Create 

project simulator files  

2. Click Generate.  

 

I should be able to start compilation after that step but the generation fails. 

 

The error message is: 

error: cpu_crc_inst: generated hdl with parameters is not supported in the classic flow. 

 

Error: The HDL simulator path does not contain the simulator: C:\Users\Nanthini\Desktop\project_dir\crc_hw\vsim.exe 

 

 

By the way, I am using version 12.1 and doing CRC system. 

 

Can somebody help me?
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4 Replies
Altera_Forum
Honored Contributor II
550 Views

Can you try generating without selecting Simulation?

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Altera_Forum
Honored Contributor II
550 Views

Earlier I was trying to build my own sopc file with the given associated files. When I generate this error was shown. Later I used the given sopc file to compile and it compiled successfully but when I generate with simulation the same error appears. Why this error message?

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Altera_Forum
Honored Contributor II
550 Views

I'm not sure what the issue is, but here are some thoughts: 

 

1) This is a known error message by Altera. They suggest using Qsys instead of SOPCBuilder: https://www.altera.com/support/support-resources/knowledge-base/solutions/fb96838.html 

 

2) Prior to the error message you have a lot of warnings related to cpu_CRC_inst: " parameter is described in TCL description but not in HDL file". I wonder how you generated the tcl file: did you write it by hand or use SOPC builder? 

I know in Qsys, you can import your HDL files and make a library block. This will generate the appropriate TCL file that can be instantiated in the Qsys system. Sometimes Qsys can make mistakes (it's pretty stupid), so you can manually edit the TCL script to fix up the mistakes. 

 

3) Maybe this is a license issue... 

 

I think your best bet would be to upgrade to 13.1 and use Qsys. This version seems to be pretty stable - it's what I use and I've never come across this issue. 

 

Let me know what you think.
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Altera_Forum
Honored Contributor II
550 Views

I used SOPC builder. SOPC lets you import HDL files too. Wouldn't be license issue because the version that I am using is free edition. I am currently working out with the given sopc file and it has no problem so far. I faced problem when I created custom instruction in the SOPC builder only. I just got my DE2 board and I am proceeding with the eclipse part of my project. If I have any more trouble I will refer here. Thank you so much, Krasner for making time to reply. Really appreciate it.

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