ExclusiveAccess Exception while running OpenCL program on Altera FPGA

[Altera_Forum]

Hello Everyone, 

 I am trying to run a OpenCL Wordcount program on an Altera FPGA using Quartus Prime Pro 15.1.2 Edition, and while programming the FPGA using JTAG I am getting the following Exceptions:  ExclusiveAccess -> Trying to Acquire lock ==> lockname = kernel.process.sync.file.Altera => TID = 124 ExclusiveAccess -> Success Acquiring lock ==> lockname = kernel.process.sync.file.Altera => TID = 124 ExclusiveAccess -> Released lock ==> lockname = kernel.process.sync.file.Altera => TID = 124  !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! This is getting generated continuously !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!   ExclusiveAccess -> Exception: ==> sun.nio.ch.SharedFileLockTable.checkList(FileLockTable.java:255) => lockName = kernel.process.sync.file.Altera => TID = 123 ExclusiveAccess -> Exception: ==> sun.nio.ch.SharedFileLockTable.checkList(FileLockTable.java:255) => lockName = kernel.process.sync.file.Altera => TID = 123 ExclusiveAccess -> Exception: ==> sun.nio.ch.SharedFileLockTable.checkList(FileLockTable.java:255) => lockName = kernel.process.sync.file.Altera => TID = 123  !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! This is getting generated continuously !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!    !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! After this the compiler hangs and program is not responding !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!   Does anyone have any idea why I might be getting this error?  Note: The OpenCL code has been generated from Java Code using a Compiler  Thanks in Advance, Saurabh