FIFO performance penalty show-ahead mode

[Altera_Forum]

In Megawizard and FIFO User guide is a note, that the show ahead mode suffers an performance penalty/ this mode may reduce performance. 

But nowhere is specifically explained what performance may suffer. It is clear that show ahead mode has a higher wr_req to q latency but is there also a overall Fmax penalty? In my understanding i can write and read in each clock cycle, either in normal or show ahead mode, of course i can only write if FIFO is not full and can only read if FIFO is not empty.  I'm asking because sometimes it is easier to work with read ack(show ahead) instead of read(normal mode) and i don't see any reason not to work with show ahead(latency does not mater in my case) except this mysterious performance penalty. While working with high clock frequency an reduced Fmax/timing performance will indeed be bad and a reason to use normal mode.

[Altera_Forum]

--- Quote Start ---  In Megawizard and FIFO User guide is a note, that the show ahead mode suffers an performance penalty/ this mode may reduce performance. But nowhere is specifically explained what performance may suffer. It is clear that show ahead mode has a higher wr_req to q latency but is there also a overall Fmax penalty? In my understanding i can write and read in each clock cycle, either in normal or show ahead mode, of course i can only write if FIFO is not full and can only read if FIFO is not empty.  I'm asking because sometimes it is easier to work with read ack(show ahead) instead of read(normal mode) and i don't see any reason not to work with show ahead(latency does not mater in my case) except this mysterious performance penalty. While working with high clock frequency an reduced Fmax/timing performance will indeed be bad and a reason to use normal mode.  --- Quote End ---    I think you may readily see the difference if you compile in both cases on same project.