Hi,
I have created a hierarchical QSYS design.
This loads into Platform Designer, saves and passes validation checks.
However, when running "generate HDL" I am getting two errors:
Error writing sopcinfo ...etc
and Error writing qip report ... etc
(see the attached screen shot).
This QSYS is part of a much larger design so I recreated it as a standalone project and the errors still occur. The test project archive is also attached.
Grateful for any help or clues.
David
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May I know how urgent this issue is?
Does this total roadblock your developments?
The reason is there might be bit delay is reply as developer is working on high priority case.
If no, I would suggest to reopen or create new case for this for follow up in future.
Let me know
Hi David,
Thanks for letting me know. After checking with developer, seem 2 weeks is not possible. Thus, I suggest to follow up this after >2 weeks. You may reopen or create mentioning this forum as this is to avoid the forum from idling. This is valid bug as we can confirm this in recent build. I am working closely with developer. Might take sometimes for wa/fix.
