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Hi, I've designed a filter pass low with 64 taps.
I am not sur about my coding and I will be grateful if someone correct or confirm my vhd file. I have some doubts about the output signal. Any suggestion will be welcome. Kind regardsLink Copied
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Hi,
my first thoughts:- yep, should have low-pass behavior
- FIR design, so it'll be stable
- your code could need some indentation, and is written in a bit complicated way, but that's fine
- your simulation is not labeled, I can just do educated guesses on what's going on
- Wikipedia basics about FIR an IIR: https://en.wikipedia.org/wiki/infinite_impulse_response (https://en.wikipedia.org/wiki/infinite_impulse_response), https://en.wikipedia.org/wiki/finite_impulse_response (https://en.wikipedia.org/wiki/finite_impulse_response)
- Use Scilab to calculate filter coefficients for real filters: https://help.scilab.org/docs/6.0.0/en_us/eqiir.html (https://help.scilab.org/docs/6.0.0/en_us/eqiir.html)
- Use fixed-point arithmetic in VHDL to easily model those filters: https://web.archive.org/web/20160313200350/http://vhdl.org/fphdl/index.html (https://web.archive.org/web/20160313200350/http://vhdl.org/fphdl/index.html)
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Hi,
I had a quick review of your code. First answer few questions: 1. Where are your filter coeficients? Are you trying implement moving average filter? 2. What type of filter you are trying to implement? FIR (Finite Impulse Response ) or IIR (Infinite inpulse response)? Some comments on your code: Your code sums up input signal 64 times with itself. For eg. if signal_in=1 then you will get DOUT(63)=64. This is not how digital filters works.
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