Fitter and TimeQuest can't find my clock nets

[Altera_Forum]

Hi,  

My design has large portions of logic clocked by clocks originating in GXBs. I've closed timing in the past, but recently, both the Fitter and TimeQuest are complaining that the target is empty when I try to create_generated_clock in my sdc. I believe that the clock net that drives my clocks is taking it's name from random portions of its traversal through the hierarchy.  Is there any way that I can get my clock definition to stick to a pin and not get lost between compiles?  Thanks, Dave.

[Altera_Forum]

I found the answer to my problem:  

Running "derive_pll_clocks" in TimeQuest finds all the clock source pins in the design, and then I can change the clock names to something meaningful to me, and go.  Thanks to anyone who thought of helping, and I hope my solution can help someone else. Dave.