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Though I would pass on a suggestion that has saved my loads of time.
There is a add-on Gigibyte i-ram that is basically a 4G SATA drive made out of DDR2 RAM and its fast. http://tw.giga-byte.com/products/storage/products_overview.aspx?productid=2180&productname=gc-ramdisk If you put your projects on it and compile with Quartus II you can bring compile times down from 1.5 hours to 9 minutes. I would recommend copying the project back to real hard disk afterwards.Link Copied
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I've two questions.
1) In the product description there is only DDR memory mentioned (i-RAM and i-RAM Box). Do you have an improved version? Or just a "2" too much? :) If correct, where can I buy the DDR2 versions? 2) The compile time decreases by 90% (90 minutes to 9 minutes). Do you have this behaviour in every project you tested or is this statement just the best case? What is the average? I mean even half compile time will save a lot. In my upcoming project I'll use a Stratix4 and the compile times will increase I guess. So i-RAM (with 4GB) could save a lot for only 200€ (110€ i-RAM + 90€ 4GB DDR RAM). I've never noticed that Quartus uses the HDD during compilation excessively - otherwise the gain of i-RAM wouldn't be such high.- Mark as New
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1) As yet as far as I am aware there is no DDR2 version. I know people you would dearly like a DDR2 version but it is not our product so I have no idea if one is planned.
2) The improvement time a "best case" with the project I was working on which is a cyclone 3 with nios sub system. I think its because Quartus creates a large number of little files rather than writes to the disk a lot and that is why you get the compile time improvement with it.- Mark as New
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Hi iskh,
One of our engineers tried repeating your experiment here at Altera using a Windows ramdisk, ie, you convince Windows to use some of excess RAM as though it were a hard drive. However, he didn't find any difference in speed. Do you know if there's anything unusual about your system (eg high disk fragmentation, running out of real memory) that might have caused an impact? Also, are the times you quote just for Quartus or do they include SOPC as well? If everything appears to be normal, we'd be interested in having a look at your project to see if there's something funny going on. Thanks, Adrian Ludwin Altera Corp.- Mark as New
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I use i-RAM too, it has significant performance gain. RAM disk probably won't help much since it takes system memory bandwidth. just my 2cents.
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Which modules get the biggest speedups (eg map, fit, tan/STA)? If anyone who's used this would be interested in posting the runtimes of these modules, as well as some specs about their computers (eg processor, cache size, etc) that would be great.
Thanks, Adrian Ludwin Altera Corp.- Mark as New
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Adrian
I-RAM is not the same as windows ram disk. Using windows ramdisk will not give the same performance increase. There are a number of reasons for this but the main one is that the i-ram is a SATA drive and the SATA infrastructure and SATA windows drivers are designed to be high bandwidth (1.5Gb/s data transfer rate). The PC I am using is a dual core AMD running XP 64 and 4 G of RAM. The project is a SOPC targetted at a Cyclone 3. I ran SOPC builder to build the SPOC system and then a VHDL wrapper to connect to the outside world. I am using Quartus 2 version 8 I am away for 2 weeks but I will compile the project from i-ram and from regular harddisk and get the respective compile times for the various sections when I get back.- Mark as New
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I ordered 1 i-RAM device with 4GB of Memory and I will give some results on my machine when I get it.
My Altera FAE will also be informed about the results.- Mark as New
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Also try it with your simulation run, you'll be very impressed.
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Thanks everyone, we'll be watching as well.
Cheers, Adrian Altera Corp.- Mark as New
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So, yesterday I received my i-RAM and I did some tests.
I tested two different EP2S60 designs and the compile time reduction is less than 5%. I doubted the gain of this device and until now I'm right. I will do some further testing with other designs and Modelsim. The only gain can be when the pc runs out of RAM and starts to swap, but without enough RAM you shouldn't design FPGAs.;) so far...- Mark as New
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Thanks tralf, that's interesting.
Cheers, Adrian Altera Corp.- Subscribe to RSS Feed
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